This is the TCM Hard Reset state. Enabling will reset the TCM
processor and the hardware. The operation will be invalid if
this is the only TCM or if it is the active TCM while the
standby is not ready to protect.
Parsed from file fore-timing.mib.txt
Company: marconi
Module: Fore-TIMING-MIB
Vendor: Marconi
Module: Fore-TIMING-MIB (fore-timing.mib-mib)
Type: TABULAR
Access: read-write
Syntax: INTEGER
Automatically extracted from www.mibdepot.com
tcmHardReset OBJECT-TYPE SYNTAX INTEGER { enable(1), disable(2) } MAX-ACCESS read-write STATUS current DESCRIPTION "This is the TCM Hard Reset state. Enabling will reset the TCM processor and the hardware. The operation will be invalid if this is the only TCM or if it is the active TCM while the standby is not ready to protect." DEFVAL { disable } ::= { tcmEntry 21 }
OID | Name | Sub children | Sub Nodes Total | Description |
---|---|---|---|---|
1.3.6.1.4.1.326.2.2.1.11.1.1.1 | tcmIndex | 0 | 0 | This is the index for this Timing Control Module (TCM) . |
1.3.6.1.4.1.326.2.2.1.11.1.1.2 | tcmHwType | 0 | 0 | This is the type for this Timing Control Module (TCM) . |
1.3.6.1.4.1.326.2.2.1.11.1.1.3 | tcmHwVersion | 0 | 0 | This is the version for this Timing Control Module (TCM) . |
1.3.6.1.4.1.326.2.2.1.11.1.1.4 | tcmPllStatus | 0 | 0 | This is the phase-locked loop (PLL) status for this Timing Control Module (TCM) . |
1.3.6.1.4.1.326.2.2.1.11.1.1.5 | tcmOperationStatus | 0 | 0 | This is the operation status of the clock output for this Timing Control Module (TCM). The status is enabled if the switch is con… |
1.3.6.1.4.1.326.2.2.1.11.1.1.6 | tcmCurrentTimingRef | 0 | 0 | This is the current timing reference in use for this Timing Control Module (TCM) . |
1.3.6.1.4.1.326.2.2.1.11.1.1.7 | tcmRequestedTimingMode | 0 | 0 | This is the timing reference requested to be used for this Timing Control Module (TCM) . |
1.3.6.1.4.1.326.2.2.1.11.1.1.8 | tcmOperatingTimingMode | 0 | 0 | This is the operating timing mode, which can be different from the requested timing mode if mode failover is enabled. |
1.3.6.1.4.1.326.2.2.1.11.1.1.9 | tcmModeFailover | 0 | 0 | This is the modefailover that causes the Timing Control Module (TCM) to automatically switch between timing modes (for example ex… |
1.3.6.1.4.1.326.2.2.1.11.1.1.10 | tcmPrimaryRefSource | 0 | 0 | This is the primary timing reference source for this Timing Control Module (TCM) . |
1.3.6.1.4.1.326.2.2.1.11.1.1.11 | tcmSecondaryRefSource | 0 | 0 | This is the secondary timing reference source for this Timing Control Module (TCM) . |
1.3.6.1.4.1.326.2.2.1.11.1.1.12 | tcmBitsFramingFormat | 0 | 0 | This is the framing format of the BITS interface for this Timing Control Module (TCM) . |
1.3.6.1.4.1.326.2.2.1.11.1.1.13 | tcmBitsCodingFormat | 0 | 0 | This is the coding format of the BITS interface for this Timing Control Module (TCM) . |
1.3.6.1.4.1.326.2.2.1.11.1.1.14 | tcmBitsOutputLevel | 0 | 0 | This is the output level (dB) of the DS1 BITS interface for this Timing Control Module (TCM) . |
1.3.6.1.4.1.326.2.2.1.11.1.1.15 | tcmRevertiveSwitching | 0 | 0 | This is the status of the revertive switching for timing sources on this Timing Control Module (TCM) . |
1.3.6.1.4.1.326.2.2.1.11.1.1.16 | tcmRevertiveDelay | 0 | 0 | This is the amount of time after the restoration of the primary timing reference before the Timing Control Module (TCM) will be … |
1.3.6.1.4.1.326.2.2.1.11.1.1.17 | tcmFailoverDelay | 0 | 0 | This is the amount of time after the failure of a timing reference before the Timing Control Module (TCM) will be instructed to … |
1.3.6.1.4.1.326.2.2.1.11.1.1.18 | tcmHwSerialNum | 0 | 0 | This is the serial number for this Timing Control Module (TCM). |
1.3.6.1.4.1.326.2.2.1.11.1.1.19 | tcmLastRefFailOver | 0 | 0 | This is the date and time of the last reference failover. |
1.3.6.1.4.1.326.2.2.1.11.1.1.20 | tcmRedundancyState | 0 | 0 | This is the TCM redundancy state. If active, the TCM is the working clock unit. If standby, the TCM is the protection clock unit. |
1.3.6.1.4.1.326.2.2.1.11.1.1.22 | tcmSoftReset | 0 | 0 | This is the TCM Soft Reset state. Enabling will reset the TCM processor and not the hardware. |
1.3.6.1.4.1.326.2.2.1.11.1.1.23 | tcmManualSwitchover | 0 | 0 | Forces the Standby TCM to take control from the Active TCM. |
1.3.6.1.4.1.326.2.2.1.11.1.1.24 | tcmProtectionState | 0 | 0 | This is the TCM protection state. The active TCM can be in the protecting state. The standby tcm can be in ready to protect or ge… |
1.3.6.1.4.1.326.2.2.1.11.1.1.25 | tcmPanicText | 0 | 0 | The most recent panic record of this Timing Control Module (TCM). |
1.3.6.1.4.1.326.2.2.1.11.1.1.26 | tcmHotswapState | 0 | 0 | This is the TCM hotswap state. A 0 indicates that the TCM is IN and 1 indicates that the TCM is out. |
1.3.6.1.4.1.326.2.2.1.11.1.1.27 | tcmFailureReason | 0 | 0 | This is the TCM Failure Reason. When the TCM goes to the failed state, the reason can be one of the above six. msp_fail is not va… |
1.3.6.1.4.1.326.2.2.1.11.1.1.28 | tcmHwCleiCode | 0 | 0 | This is the CLEI code for this Timing Control Module (TCM). |
1.3.6.1.4.1.326.2.2.1.11.1.1.29 | tcmHwRevision | 0 | 0 | This is the 2 byte hardware revision for this Timing Control Module (TCM) . |