Reference record for OID 1.3.6.1.4.1.278.109.2.2.4.1.5

Parent
1.3.6.1.4.1.278.109.2.2.4.1 (gm2CpuUtilizationCtrl)
Node code
5
Node name
gm2CpuUtilizationNotifyTrapState
Numeric OID
1.3.6.1.4.1.278.109.2.2.4.1.5
URN notation
urn:oid:1.3.6.1.4.1.278.109.2.2.4.1.5
ASN.1 notation

{1 3 6 1 4 1 278 109 2 2 4 1 5}

  • {iso(1) identified-organization(3) dod(6) internet(1) private(4) enterprise(1) hitachi-cable(278) aplgm2(109) gm2Mibs(2) gm2Hardware(2) gm2CpuUtilization(4) gm2CpuUtilizationCtrl(1) gm2CpuUtilizationNotifyTrapState(5)}
  • {iso(1) identified-organization(3) dod(6) internet(1) private(4) enterprises(1) hitachi-cable(278) aplgm2(109) gm2Mibs(2) gm2Hardware(2) gm2CpuUtilization(4) gm2CpuUtilizationCtrl(1) gm2CpuUtilizationNotifyTrapState(5)}
  • {iso(1) identified-organization(3) dod(6) internet(1) private(4) ldap-enterprise(1) hitachi-cable(278) aplgm2(109) gm2Mibs(2) gm2Hardware(2) gm2CpuUtilization(4) gm2CpuUtilizationCtrl(1) gm2CpuUtilizationNotifyTrapState(5)}
  • {iso(1) identified-organization(3) dod(6) internet(1) private(4) vendor-objects(1) hitachi-cable(278) aplgm2(109) gm2Mibs(2) gm2Hardware(2) gm2CpuUtilization(4) gm2CpuUtilizationCtrl(1) gm2CpuUtilizationNotifyTrapState(5)}
  • {iso(1) org(3) dod(6) internet(1) private(4) enterprise(1) hitachi-cable(278) aplgm2(109) gm2Mibs(2) gm2Hardware(2) gm2CpuUtilization(4) gm2CpuUtilizationCtrl(1) gm2CpuUtilizationNotifyTrapState(5)}
  • {iso(1) org(3) dod(6) internet(1) private(4) enterprises(1) hitachi-cable(278) aplgm2(109) gm2Mibs(2) gm2Hardware(2) gm2CpuUtilization(4) gm2CpuUtilizationCtrl(1) gm2CpuUtilizationNotifyTrapState(5)}
  • {iso(1) org(3) dod(6) internet(1) private(4) ldap-enterprise(1) hitachi-cable(278) aplgm2(109) gm2Mibs(2) gm2Hardware(2) gm2CpuUtilization(4) gm2CpuUtilizationCtrl(1) gm2CpuUtilizationNotifyTrapState(5)}
  • {iso(1) org(3) dod(6) internet(1) private(4) vendor-objects(1) hitachi-cable(278) aplgm2(109) gm2Mibs(2) gm2Hardware(2) gm2CpuUtilization(4) gm2CpuUtilizationCtrl(1) gm2CpuUtilizationNotifyTrapState(5)}
  • {iso(1) iso-identified-organization(3) dod(6) internet(1) private(4) enterprise(1) hitachi-cable(278) aplgm2(109) gm2Mibs(2) gm2Hardware(2) gm2CpuUtilization(4) gm2CpuUtilizationCtrl(1) gm2CpuUtilizationNotifyTrapState(5)}
  • {iso(1) iso-identified-organization(3) dod(6) internet(1) private(4) enterprises(1) hitachi-cable(278) aplgm2(109) gm2Mibs(2) gm2Hardware(2) gm2CpuUtilization(4) gm2CpuUtilizationCtrl(1) gm2CpuUtilizationNotifyTrapState(5)}
  • {iso(1) iso-identified-organization(3) dod(6) internet(1) private(4) ldap-enterprise(1) hitachi-cable(278) aplgm2(109) gm2Mibs(2) gm2Hardware(2) gm2CpuUtilization(4) gm2CpuUtilizationCtrl(1) gm2CpuUtilizationNotifyTrapState(5)}
  • {iso(1) iso-identified-organization(3) dod(6) internet(1) private(4) vendor-objects(1) hitachi-cable(278) aplgm2(109) gm2Mibs(2) gm2Hardware(2) gm2CpuUtilization(4) gm2CpuUtilizationCtrl(1) gm2CpuUtilizationNotifyTrapState(5)}
  • {iso(1) iso-organization(3) dod(6) internet(1) private(4) enterprise(1) hitachi-cable(278) aplgm2(109) gm2Mibs(2) gm2Hardware(2) gm2CpuUtilization(4) gm2CpuUtilizationCtrl(1) gm2CpuUtilizationNotifyTrapState(5)}
  • {iso(1) iso-organization(3) dod(6) internet(1) private(4) enterprises(1) hitachi-cable(278) aplgm2(109) gm2Mibs(2) gm2Hardware(2) gm2CpuUtilization(4) gm2CpuUtilizationCtrl(1) gm2CpuUtilizationNotifyTrapState(5)}
  • {iso(1) iso-organization(3) dod(6) internet(1) private(4) ldap-enterprise(1) hitachi-cable(278) aplgm2(109) gm2Mibs(2) gm2Hardware(2) gm2CpuUtilization(4) gm2CpuUtilizationCtrl(1) gm2CpuUtilizationNotifyTrapState(5)}
  • {iso(1) iso-organization(3) dod(6) internet(1) private(4) vendor-objects(1) hitachi-cable(278) aplgm2(109) gm2Mibs(2) gm2Hardware(2) gm2CpuUtilization(4) gm2CpuUtilizationCtrl(1) gm2CpuUtilizationNotifyTrapState(5)}
OID-IRI notation
  • /1/3/6/1/4/1/278/109/2/2/4/1/5
  • /ISO/Identified-Organization/6/1/4/1/278/109/2/2/4/1/5
  • /ISO/3/6/1/4/1/278/109/2/2/4/1/5
Named path variants
  • /iso/identified-organization/dod/internet/private/enterprise/278/aplgm2/gm2Mibs/gm2Hardware/gm2CpuUtilization/gm2CpuUtilizationCtrl/gm2CpuUtilizationNotifyTrapState
  • /iso/identified-organization/dod/internet/private/enterprise/hitachi-cable/aplgm2/gm2Mibs/gm2Hardware/gm2CpuUtilization/gm2CpuUtilizationCtrl/gm2CpuUtilizationNotifyTrapState
  • /iso/identified-organization/dod/internet/private/enterprises/278/aplgm2/gm2Mibs/gm2Hardware/gm2CpuUtilization/gm2CpuUtilizationCtrl/gm2CpuUtilizationNotifyTrapState
  • /iso/identified-organization/dod/internet/private/enterprises/hitachi-cable/aplgm2/gm2Mibs/gm2Hardware/gm2CpuUtilization/gm2CpuUtilizationCtrl/gm2CpuUtilizationNotifyTrapState
  • /iso/identified-organization/dod/internet/private/ldap-enterprise/278/aplgm2/gm2Mibs/gm2Hardware/gm2CpuUtilization/gm2CpuUtilizationCtrl/gm2CpuUtilizationNotifyTrapState
  • /iso/identified-organization/dod/internet/private/ldap-enterprise/hitachi-cable/aplgm2/gm2Mibs/gm2Hardware/gm2CpuUtilization/gm2CpuUtilizationCtrl/gm2CpuUtilizationNotifyTrapState
  • /iso/identified-organization/dod/internet/private/vendor-objects/278/aplgm2/gm2Mibs/gm2Hardware/gm2CpuUtilization/gm2CpuUtilizationCtrl/gm2CpuUtilizationNotifyTrapState
  • /iso/identified-organization/dod/internet/private/vendor-objects/hitachi-cable/aplgm2/gm2Mibs/gm2Hardware/gm2CpuUtilization/gm2CpuUtilizationCtrl/gm2CpuUtilizationNotifyTrapState
  • /iso/org/dod/internet/private/enterprise/278/aplgm2/gm2Mibs/gm2Hardware/gm2CpuUtilization/gm2CpuUtilizationCtrl/gm2CpuUtilizationNotifyTrapState
  • /iso/org/dod/internet/private/enterprise/hitachi-cable/aplgm2/gm2Mibs/gm2Hardware/gm2CpuUtilization/gm2CpuUtilizationCtrl/gm2CpuUtilizationNotifyTrapState
  • /iso/org/dod/internet/private/enterprises/278/aplgm2/gm2Mibs/gm2Hardware/gm2CpuUtilization/gm2CpuUtilizationCtrl/gm2CpuUtilizationNotifyTrapState
  • /iso/org/dod/internet/private/enterprises/hitachi-cable/aplgm2/gm2Mibs/gm2Hardware/gm2CpuUtilization/gm2CpuUtilizationCtrl/gm2CpuUtilizationNotifyTrapState
  • /iso/org/dod/internet/private/ldap-enterprise/278/aplgm2/gm2Mibs/gm2Hardware/gm2CpuUtilization/gm2CpuUtilizationCtrl/gm2CpuUtilizationNotifyTrapState
  • /iso/org/dod/internet/private/ldap-enterprise/hitachi-cable/aplgm2/gm2Mibs/gm2Hardware/gm2CpuUtilization/gm2CpuUtilizationCtrl/gm2CpuUtilizationNotifyTrapState
  • /iso/org/dod/internet/private/vendor-objects/278/aplgm2/gm2Mibs/gm2Hardware/gm2CpuUtilization/gm2CpuUtilizationCtrl/gm2CpuUtilizationNotifyTrapState
  • /iso/org/dod/internet/private/vendor-objects/hitachi-cable/aplgm2/gm2Mibs/gm2Hardware/gm2CpuUtilization/gm2CpuUtilizationCtrl/gm2CpuUtilizationNotifyTrapState
  • Additional combinations skipped.

Descriptions

gm2CpuUtilizationNotifyTrapState — APRESIA official small-business switch MIB packages

This object indicates the state of the mechanism for CPU utilization notify to send trap. If set to enable, trap will be active while the CPU utilization status changes. If set to disable, the status change will not trigger the trap event.

gm2CpuUtilizationNotifyTrapState — APRESIA GM200 official detailed MIB manual

装置の CPU 使用率監視の SNMP トラップ通知の状態を示します。

Source records

gm2CpuUtilizationNotifyTrapState

Status in source: current.

Names: gm2CpuUtilizationNotifyTrapState

Technical details
{
  "smi_kind": "OBJECT-TYPE",
  "definition": [
    "gm2CpuUtilizationNotifyTrapState",
    "OBJECT-TYPE",
    "SYNTAX",
    "INTEGER",
    "{",
    "enable",
    "(",
    "1",
    ")",
    ",",
    "disable",
    "(",
    "2",
    ")",
    "}",
    "MAX-ACCESS",
    "read-write",
    "STATUS",
    "current",
    "DESCRIPTION",
    "\"This object indicates the state of the mechanism for CPU utilization notify to send trap. If set to enable, trap will be active while the CPU utilization status changes. If set to disable, the status change will not trigger the trap event.\"",
    "DEFVAL",
    "{",
    "disable",
    "}",
    "::=",
    "{",
    "gm2CpuUtilizationCtrl",
    "5",
    "}"
  ],
  "syntax_tree": [
    [
      "SimpleSyntax",
      "INTEGER",
      [
        "enumSpec",
        [
          [
            "enable",
            1
          ],
          [
            "disable",
            2
          ]
        ]
      ]
    ],
    null,
    [
      "MaxAccessPart",
      "read-write"
    ],
    [
      "Status",
      "current"
    ],
    [
      "DESCRIPTION",
      "This object indicates the state of the mechanism for CPU utilization notify to send trap. If set to enable, trap will be active while the CPU utilization status changes. If set to disable, the status change will not trigger the trap event."
    ],
    null,
    null,
    null,
    [
      "DEFVAL",
      "disable"
    ]
  ]
}
  • APRESIA official small-business switch MIB packages · Publisher's source file: Source package: APLGM200-mibs_104.zip

    Module: APLGM200MIB

    Published definition
    gm2CpuUtilizationNotifyTrapState OBJECT-TYPE
    			SYNTAX INTEGER
    				{
    				enable(1),
    				disable(2)
    				}
    			MAX-ACCESS read-write
    			STATUS current
    			DESCRIPTION
    				"This object indicates the state of the mechanism for CPU utilization notify 
    				 to send trap. If set to enable, trap will be active while the CPU 
    				 utilization status changes. If set to disable, the status change will not trigger the trap event."
    			DEFVAL {disable}     
    			::= { gm2CpuUtilizationCtrl 5 }
    Module imports
    {'IF-MIB': ['ifIndex'], 'SNMPv2-TC': ['MacAddress', 'RowStatus', 'DisplayString'], 'SNMPv2-MIB': ['sysDescr', 'sysObjectID'], 'SNMPv2-SMI': ['MODULE-IDENTITY', 'OBJECT-TYPE', 'Counter32', 'NOTIFICATION-TYPE', 'Integer32', 'Gauge32', 'IpAddress', 'TimeTicks'], 'RFC1155-SMI': ['enterprises'], 'RFC1213-MIB': ['mib-2', 'ifIndex', 'PhysAddress', 'sysDescr', 'sysObjectID', 'sysObjectID'], 'Q-BRIDGE-MIB': ['dot1qVlanIndex', 'PortList'], 'IEEE8023-LAG-MIB': ['dot3adAggActorAdminKey']}

    Source data warning: The official GM200 MIB defines its management branch under 1.3.6.1.4.1.278.109. The linked GM200 v2.03 manual prints 1.3.6.1.4.1.278.1.109 in its overview tree, but its detailed object tables independently agree with the MIB on 1.3.6.1.4.1.278.109. Both official documents are available for comparison; device and firmware behaviour is unconfirmed.

    · Download APRESIA official MIB — APLGM200-mibs_104.zip / APLGM200-mibs.mib

    Related source files and packages:


    Source location: APLGM200MIB::gm2CpuUtilizationNotifyTrapState.
    Source version and references

    The official GM200 MIB defines its management branch under 1.3.6.1.4.1.278.109. The linked GM200 v2.03 manual prints 1.3.6.1.4.1.278.1.109 in its overview tree, but its detailed object tables independently agree with the MIB on 1.3.6.1.4.1.278.109. Both official documents are available for comparison; device and firmware behaviour is unconfirmed.; Publisher path: support/manual/image/APLGM200-mibs_104.zip; 83,940 bytes

    Downloaded: 2026-11-03T01:07:30.963126+00:00.

  • APRESIA official small-business switch MIB packages · Publisher's source file: Source package: APLGM200-mibs_105.zip

    Module: APLGM200MIB

    Published definition
    gm2CpuUtilizationNotifyTrapState OBJECT-TYPE
    			SYNTAX INTEGER
    				{
    				enable(1),
    				disable(2)
    				}
    			MAX-ACCESS read-write
    			STATUS current
    			DESCRIPTION
    				"This object indicates the state of the mechanism for CPU utilization notify 
    				 to send trap. If set to enable, trap will be active while the CPU 
    				 utilization status changes. If set to disable, the status change will not trigger the trap event."
    			DEFVAL {disable}     
    			::= { gm2CpuUtilizationCtrl 5 }
    Module imports
    {'IF-MIB': ['ifIndex'], 'SNMPv2-TC': ['MacAddress', 'RowStatus', 'DisplayString'], 'SNMPv2-MIB': ['sysDescr', 'sysObjectID'], 'SNMPv2-SMI': ['MODULE-IDENTITY', 'OBJECT-TYPE', 'Counter32', 'NOTIFICATION-TYPE', 'Integer32', 'Gauge32', 'IpAddress', 'TimeTicks'], 'RFC1155-SMI': ['enterprises'], 'RFC1213-MIB': ['mib-2', 'ifIndex', 'PhysAddress', 'sysDescr', 'sysObjectID', 'sysObjectID'], 'Q-BRIDGE-MIB': ['dot1qVlanIndex', 'PortList'], 'IEEE8023-LAG-MIB': ['dot3adAggActorAdminKey']}

    Source data warning: The official GM200 MIB defines its management branch under 1.3.6.1.4.1.278.109. The linked GM200 v2.03 manual prints 1.3.6.1.4.1.278.1.109 in its overview tree, but its detailed object tables independently agree with the MIB on 1.3.6.1.4.1.278.109. Both official documents are available for comparison; device and firmware behaviour is unconfirmed.

    · Download APRESIA official MIB — APLGM200-mibs_105.zip / APLGM200-mibs.mib

    Related source files and packages:


    Source location: APLGM200MIB::gm2CpuUtilizationNotifyTrapState.
    Source version and references

    The official GM200 MIB defines its management branch under 1.3.6.1.4.1.278.109. The linked GM200 v2.03 manual prints 1.3.6.1.4.1.278.1.109 in its overview tree, but its detailed object tables independently agree with the MIB on 1.3.6.1.4.1.278.109. Both official documents are available for comparison; device and firmware behaviour is unconfirmed.; File: APLGM200-mibs_105/APLGM200-mibs.mib; Publisher path: support/manual/image/APLGM200-mibs_105.zip; 83,604 bytes

    Downloaded: 2026-11-03T01:07:32.168110+00:00.

gm2CpuUtilizationNotifyTrapState

Status in source: unspecified.

Names: gm2CpuUtilizationNotifyTrapState

Technical details
{
  "definition": [
    "・",
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  ]
}

First Registration Authority (inferred from ancestor 1.3.6.1.4.1.278)

Asai Takahiro

Siblings (5)

OIDNameDirect childrenDescendantsDescription
1.3.6.1.4.1.278.109.2.2.4.1.1 gm2CpuUtilizationNotifyCurrentStatus00
1.3.6.1.4.1.278.109.2.2.4.1.2 gm2CpuUtilizationNotifyState00
1.3.6.1.4.1.278.109.2.2.4.1.3 gm2CpuUtilizationNotifyThreshold00
1.3.6.1.4.1.278.109.2.2.4.1.4 gm2CpuUtilizationNotifyPollingInterval00
1.3.6.1.4.1.278.109.2.2.4.1.6 gm2CpuUtilizationNotifyLogState00