Detailed information per CPU core
Sources for this description
Multiple manufacturers; see the original MIB MIB copies (LibreNMS/Observium Community)
OID reference
1.3.6.1.4.1.3709.3.6.4.1.3
Detailed information per CPU core
Identification
{1 3 6 1 4 1 3709 3 6 4 1 3}
Properties come from available MIB definitions. Actual device support and access can differ. See source records below for original files and qualifications.
The displayed source records contain one distinct definition. Compare its source records.
cpuCoreTable OBJECT-TYPE
SYNTAX SEQUENCE OF CpuCoreEntry
MAX-ACCESS not-accessible
STATUS current
DESCRIPTION "Detailed information per CPU core"
::= { cpu 3 }
Meaning
Identical descriptions are grouped. Different wording and device-specific notes are retained.
Detailed information per CPU core
Multiple manufacturers; see the original MIB MIB copies (LibreNMS/Observium Community)
Evidence
Matching descriptions are grouped; open a group to compare definitions and supporting files.
Status in source: current.
Names: cpuCoreTable
{
"smi_kind": "OBJECT-TYPE",
"definition": [
"cpuCoreTable",
"OBJECT-TYPE",
"SYNTAX",
"SEQUENCE",
"OF",
"CpuCoreEntry",
"MAX-ACCESS",
"not-accessible",
"STATUS",
"current",
"DESCRIPTION",
"\"Detailed information per CPU core\"",
"::=",
"{",
"cpu",
"3",
"}"
],
"syntax_tree": [
[
"conceptualTable",
[
"row",
"CpuCoreEntry"
]
],
null,
[
"MaxAccessPart",
"not-accessible"
],
[
"Status",
"current"
],
[
"DESCRIPTION",
"Detailed information per CPU core"
],
null,
null,
null,
null
]
}Vendor MIB copy from the LibreNMS archive.
Module: DMOS-SYSMON-MIB
See published definition above
{'SNMPv2-TC': ['DisplayString'], 'SNMPv2-SMI': ['MODULE-IDENTITY', 'OBJECT-TYPE', 'Unsigned32'], 'DATACOM-SMI': ['datacomDevicesMIBs'], 'DMOS-TC-MIB': ['Unsigned8', 'UnsignedPercent']}Related source files and packages:
Vendor MIB copy from the Observium Community archive.
Module: DMOS-SYSMON-MIB
{'SNMPv2-TC': ['DisplayString'], 'SNMPv2-SMI': ['MODULE-IDENTITY', 'OBJECT-TYPE', 'Unsigned32'], 'DATACOM-SMI': ['datacomDevicesMIBs'], 'DMOS-TC-MIB': ['Unsigned8', 'UnsignedPercent']}Related source files and packages:
Registration
| OID | Name | Direct children | Descendants | Description |
|---|---|---|---|---|
| 1.3.6.1.4.1.3709.3.6.4.1.3.1 | cpuCoreEntry | 25 | 25 |
| OID | Name | Direct children | Descendants | Description |
|---|---|---|---|---|
| 1.3.6.1.4.1.3709.3.6.4.1.1 | cpuChassisTable | 1 | 2 | |
| 1.3.6.1.4.1.3709.3.6.4.1.2 | cpuSlotTable | 1 | 8 |