OID reference

zxr10FPGAVer

1.3.6.1.4.1.3902.3.2.3.1.14

Description

It descripts the FPGA version in the board.

Full description and source information

Identification

Identifier and names

Parent
1.3.6.1.4.1.3902.3.2.3.1 (zxr10slotEntry)
Node code
14
Node name
zxr10FPGAVer
Category
SNMP management object
Numeric OID
1.3.6.1.4.1.3902.3.2.3.1.14
URN notation
urn:oid:1.3.6.1.4.1.3902.3.2.3.1.14
ASN.1, OID-IRI and named path variants
ASN.1 notation

{1 3 6 1 4 1 3902 3 2 3 1 14}

  • {iso(1) identified-organization(3) dod(6) internet(1) private(4) enterprise(1) zte(3902) zxr10(3) zxr10rack(2) zxr10slotTable(3) zxr10slotEntry(1) zxr10FPGAVer(14)}
  • {iso(1) identified-organization(3) dod(6) internet(1) private(4) enterprise(1) zxEnterpriseMib(3902) zxr10(3) zxr10rack(2) zxr10slotTable(3) zxr10slotEntry(1) zxr10FPGAVer(14)}
  • {iso(1) identified-organization(3) dod(6) internet(1) private(4) enterprises(1) zte(3902) zxr10(3) zxr10rack(2) zxr10slotTable(3) zxr10slotEntry(1) zxr10FPGAVer(14)}
  • {iso(1) identified-organization(3) dod(6) internet(1) private(4) enterprises(1) zxEnterpriseMib(3902) zxr10(3) zxr10rack(2) zxr10slotTable(3) zxr10slotEntry(1) zxr10FPGAVer(14)}
  • {iso(1) identified-organization(3) dod(6) internet(1) private(4) ldap-enterprise(1) zte(3902) zxr10(3) zxr10rack(2) zxr10slotTable(3) zxr10slotEntry(1) zxr10FPGAVer(14)}
  • {iso(1) identified-organization(3) dod(6) internet(1) private(4) ldap-enterprise(1) zxEnterpriseMib(3902) zxr10(3) zxr10rack(2) zxr10slotTable(3) zxr10slotEntry(1) zxr10FPGAVer(14)}
  • {iso(1) identified-organization(3) dod(6) internet(1) private(4) vendor-objects(1) zte(3902) zxr10(3) zxr10rack(2) zxr10slotTable(3) zxr10slotEntry(1) zxr10FPGAVer(14)}
  • {iso(1) identified-organization(3) dod(6) internet(1) private(4) vendor-objects(1) zxEnterpriseMib(3902) zxr10(3) zxr10rack(2) zxr10slotTable(3) zxr10slotEntry(1) zxr10FPGAVer(14)}
  • {iso(1) org(3) dod(6) internet(1) private(4) enterprise(1) zte(3902) zxr10(3) zxr10rack(2) zxr10slotTable(3) zxr10slotEntry(1) zxr10FPGAVer(14)}
  • {iso(1) org(3) dod(6) internet(1) private(4) enterprise(1) zxEnterpriseMib(3902) zxr10(3) zxr10rack(2) zxr10slotTable(3) zxr10slotEntry(1) zxr10FPGAVer(14)}
  • {iso(1) org(3) dod(6) internet(1) private(4) enterprises(1) zte(3902) zxr10(3) zxr10rack(2) zxr10slotTable(3) zxr10slotEntry(1) zxr10FPGAVer(14)}
  • {iso(1) org(3) dod(6) internet(1) private(4) enterprises(1) zxEnterpriseMib(3902) zxr10(3) zxr10rack(2) zxr10slotTable(3) zxr10slotEntry(1) zxr10FPGAVer(14)}
  • {iso(1) org(3) dod(6) internet(1) private(4) ldap-enterprise(1) zte(3902) zxr10(3) zxr10rack(2) zxr10slotTable(3) zxr10slotEntry(1) zxr10FPGAVer(14)}
  • {iso(1) org(3) dod(6) internet(1) private(4) ldap-enterprise(1) zxEnterpriseMib(3902) zxr10(3) zxr10rack(2) zxr10slotTable(3) zxr10slotEntry(1) zxr10FPGAVer(14)}
  • {iso(1) org(3) dod(6) internet(1) private(4) vendor-objects(1) zte(3902) zxr10(3) zxr10rack(2) zxr10slotTable(3) zxr10slotEntry(1) zxr10FPGAVer(14)}
  • {iso(1) org(3) dod(6) internet(1) private(4) vendor-objects(1) zxEnterpriseMib(3902) zxr10(3) zxr10rack(2) zxr10slotTable(3) zxr10slotEntry(1) zxr10FPGAVer(14)}
  • Additional combinations skipped.
OID-IRI notation
  • /1/3/6/1/4/1/3902/3/2/3/1/14
  • /ISO/Identified-Organization/6/1/4/1/3902/3/2/3/1/14
  • /ISO/3/6/1/4/1/3902/3/2/3/1/14
Named path variants
  • /iso/identified-organization/dod/internet/private/enterprise/3902/zxr10/zxr10rack/zxr10slotTable/zxr10slotEntry/zxr10FPGAVer
  • /iso/identified-organization/dod/internet/private/enterprise/zte/zxr10/zxr10rack/zxr10slotTable/zxr10slotEntry/zxr10FPGAVer
  • /iso/identified-organization/dod/internet/private/enterprise/zxEnterpriseMib/zxr10/zxr10rack/zxr10slotTable/zxr10slotEntry/zxr10FPGAVer
  • /iso/identified-organization/dod/internet/private/enterprises/3902/zxr10/zxr10rack/zxr10slotTable/zxr10slotEntry/zxr10FPGAVer
  • /iso/identified-organization/dod/internet/private/enterprises/zte/zxr10/zxr10rack/zxr10slotTable/zxr10slotEntry/zxr10FPGAVer
  • /iso/identified-organization/dod/internet/private/enterprises/zxEnterpriseMib/zxr10/zxr10rack/zxr10slotTable/zxr10slotEntry/zxr10FPGAVer
  • /iso/identified-organization/dod/internet/private/ldap-enterprise/3902/zxr10/zxr10rack/zxr10slotTable/zxr10slotEntry/zxr10FPGAVer
  • /iso/identified-organization/dod/internet/private/ldap-enterprise/zte/zxr10/zxr10rack/zxr10slotTable/zxr10slotEntry/zxr10FPGAVer
  • /iso/identified-organization/dod/internet/private/ldap-enterprise/zxEnterpriseMib/zxr10/zxr10rack/zxr10slotTable/zxr10slotEntry/zxr10FPGAVer
  • /iso/identified-organization/dod/internet/private/vendor-objects/3902/zxr10/zxr10rack/zxr10slotTable/zxr10slotEntry/zxr10FPGAVer
  • /iso/identified-organization/dod/internet/private/vendor-objects/zte/zxr10/zxr10rack/zxr10slotTable/zxr10slotEntry/zxr10FPGAVer
  • /iso/identified-organization/dod/internet/private/vendor-objects/zxEnterpriseMib/zxr10/zxr10rack/zxr10slotTable/zxr10slotEntry/zxr10FPGAVer
  • /iso/org/dod/internet/private/enterprise/3902/zxr10/zxr10rack/zxr10slotTable/zxr10slotEntry/zxr10FPGAVer
  • /iso/org/dod/internet/private/enterprise/zte/zxr10/zxr10rack/zxr10slotTable/zxr10slotEntry/zxr10FPGAVer
  • /iso/org/dod/internet/private/enterprise/zxEnterpriseMib/zxr10/zxr10rack/zxr10slotTable/zxr10slotEntry/zxr10FPGAVer
  • /iso/org/dod/internet/private/enterprises/3902/zxr10/zxr10rack/zxr10slotTable/zxr10slotEntry/zxr10FPGAVer
  • Additional combinations skipped.

SNMP properties

Value type
DisplayString
Maximum access defined by MIB
read-only
Status in MIB
current
Allowed size (octets)
1–128

Using this OID with SNMP

At least one MIB declaration places this object in a table row. A value belongs to a row instance; its suffix depends on the row's INDEX or AUGMENTS definition.

In ZXR10-MIB, the row index consists of these components in order:

  1. zxr10RackNo (INTEGER): one numeric subidentifier for the non-negative value.
  2. zxr10ShelfNo (INTEGER): one numeric subidentifier for the non-negative value.
  3. zxr10PosInRack (INTEGER): one numeric subidentifier for the non-negative value.

An instance has the form .1.3.6.1.4.1.3902.3.2.3.1.14.<zxr10RackNo>.<zxr10ShelfNo>.<zxr10PosInRack>. Use values present on the device and permitted by its MIB. Other definitions can differ.

Published row index: zxr10RackNo, zxr10ShelfNo, zxr10PosInRack.

snmpwalk [connection options] DEVICE .1.3.6.1.4.1.3902.3.2.3.1.14

Replace the placeholders with your connection and authentication options. Available permissions and device support can differ from the MIB.

Properties come from available MIB definitions. Actual device support and access can differ. See source records below for original files and qualifications.

The displayed source records contain one distinct definition. Compare its source records.

zxr10FPGAVer OBJECT-TYPE
              SYNTAX  DisplayString (SIZE(1..128))
              MAX-ACCESS  read-only
              STATUS  current
              DESCRIPTION
                      "It descripts the FPGA version in  the  board."
              ::= { zxr10slotEntry 14 }

Meaning

Descriptions

1 unique

Identical descriptions are grouped. Different wording and device-specific notes are retained.

It descripts the FPGA version in the board.

Sources for this description

ZTE MIB copies (LibreNMS/Observium Community)

See 1 matching source record

Evidence

Source records

1 records

Matching descriptions are grouped; open a group to compare definitions and supporting files.

Records for description 1ZTE MIB copies (LibreNMS/Observium Community)1 record · 2 sources

Description 1

zxr10FPGAVer · currentZTE MIB copies (LibreNMS/Observium Community)2 sources

Status in source: current.

Names: zxr10FPGAVer

Technical details
{
  "smi_kind": "OBJECT-TYPE",
  "definition": [
    "zxr10FPGAVer",
    "OBJECT-TYPE",
    "SYNTAX",
    "DisplayString",
    "(",
    "SIZE",
    "(",
    "1",
    ".",
    ".",
    "128",
    ")",
    ")",
    "MAX-ACCESS",
    "read-only",
    "STATUS",
    "current",
    "DESCRIPTION",
    "\"It descripts the FPGA version in the board.\"",
    "::=",
    "{",
    "zxr10slotEntry",
    "14",
    "}"
  ],
  "syntax_tree": [
    [
      "SimpleSyntax",
      "DisplayString",
      [
        "octetStringSubType",
        [
          [
            1,
            128
          ]
        ]
      ]
    ],
    null,
    [
      "MaxAccessPart",
      "read-only"
    ],
    [
      "Status",
      "current"
    ],
    [
      "DESCRIPTION",
      "It descripts the FPGA version in the board."
    ],
    null,
    null,
    null,
    null
  ]
}

Registration

Registration authorities

First Registration Authority (inferred from ancestor 1.3.6.1.4.1.3902)

Xianlin Luo

Siblings (18)

OIDNameDirect childrenDescendantsDescription
1.3.6.1.4.1.3902.3.2.3.1.1 zxr10PaneNo00
1.3.6.1.4.1.3902.3.2.3.1.2 zxr10PosInRack00
1.3.6.1.4.1.3902.3.2.3.1.3 zxr10SlotBoardType00
1.3.6.1.4.1.3902.3.2.3.1.4 zxr10SlotNPCType00
1.3.6.1.4.1.3902.3.2.3.1.5 zxr10SlotPortsNumber00
1.3.6.1.4.1.3902.3.2.3.1.6 zxr10SlotAvailStatus00
1.3.6.1.4.1.3902.3.2.3.1.7 zxr10SlotOperStatus00
1.3.6.1.4.1.3902.3.2.3.1.8 zxr10SlotMasterStatus00
1.3.6.1.4.1.3902.3.2.3.1.9 zxr10ReceiveTick00
1.3.6.1.4.1.3902.3.2.3.1.10 zxr10SlotTemperature00
1.3.6.1.4.1.3902.3.2.3.1.11 zxr10SubcardMax00
1.3.6.1.4.1.3902.3.2.3.1.12 zxr10BootVersion00
1.3.6.1.4.1.3902.3.2.3.1.13 zxr10PCBVersion00
1.3.6.1.4.1.3902.3.2.3.1.15 zxr10McodeVer00
1.3.6.1.4.1.3902.3.2.3.1.16 zxr10MasterQDRSRAMSize00
1.3.6.1.4.1.3902.3.2.3.1.17 zxr10SlaveQDRSRAMSize00
1.3.6.1.4.1.3902.3.2.3.1.18 zxr10camSize00
1.3.6.1.4.1.3902.3.2.3.1.19 zxr10BoardSilkLabel00