bitmap POST : Bit[1..0] --> 0:ALL PASS, 1:TESTING , 2:NO TEST, 3:FATAL ERROR <BME-1> <BME-2> <BME-3> <Discription> Bit[ 2] Bit[12] Bit[22] BME Status --> 0:READY, 1:NA Bit[ 3] Bit[13] Bit[23] HIC Host-BME Connection Test --> 0:PASS, 1:FAIL Bit[ 4] Bit[14] Bit[24] BME Core & Mem Clk, EMI Initialization --> 0:PASS, 1:FAIL Bit[ 5] Bit[15] Bit[25] HIC PIO SDRAM Read/Write Tests --> 0:PASS, 1:FAIL Bit[ 6] Bit[16] Bit[26] SDRAM Address & Data Bus Connection Tests --> 0:PASS, 1:FAIL Bit[ 7] Bit[17] Bit[27] Memory to Memory BME DMA Tests --> 0:PASS, 1:FAIL Bit[ 8] Bit[18] Bit[28] External Memory Interface Test --> 0:PASS, 1:FAIL Bit[ 9] Bit[19] Bit[29] BME-AFE DDR Bus Connection Tests --> 0:PASS, 1:FAIL Bit[10] Bit[20] Bit[30] AFE Register Read/Write Tests --> 0:PASS, 1:FAIL Bit[11] Bit[21] Bit[31] IFE Register Read/Write Tests --> 0:PASS, 1:FAIL
Sources for this description
Multiple manufacturers; see the original MIB MIB copies (LibreNMS/Observium Community)