Processor and Memory Utilization entry for a particular CPU.
Sources for this description
Multiple manufacturers; see the original MIB MIB copies (LibreNMS/Observium Community)Dell MIB copies (LibreNMS/Observium Community)Netdisco MIB archive copies
OID reference
1.3.6.1.4.1.6027.3.25.1.2.3.1
Processor and Memory Utilization entry for a particular CPU.
Identification
{1 3 6 1 4 1 6027 3 25 1 2 3 1}
Properties come from available MIB definitions. Actual device support and access can differ. See source records below for original files and qualifications.
The displayed source records contain one distinct definition. Compare its source records.
chSysCpuUtilEntry OBJECT-TYPE
SYNTAX ChSysCpuUtilEntry
MAX-ACCESS not-accessible
STATUS current
DESCRIPTION
"Processor and Memory Utilization entry for a
particular CPU."
INDEX { chSysProcessorIndex }
::= { chSysCpuUtilTable 1 }
Meaning
Identical descriptions are grouped. Different wording and device-specific notes are retained.
Processor and Memory Utilization entry for a particular CPU.
Multiple manufacturers; see the original MIB MIB copies (LibreNMS/Observium Community)Dell MIB copies (LibreNMS/Observium Community)Netdisco MIB archive copies
Evidence
Matching descriptions are grouped; open a group to compare definitions and supporting files.
Status in source: current.
Names: chSysCpuUtilEntry
{
"smi_kind": "OBJECT-TYPE",
"definition": [
"chSysCpuUtilEntry",
"OBJECT-TYPE",
"SYNTAX",
"ChSysCpuUtilEntry",
"MAX-ACCESS",
"not-accessible",
"STATUS",
"current",
"DESCRIPTION",
"\"Processor and Memory Utilization entry for a particular CPU.\"",
"INDEX",
"{",
"chSysProcessorIndex",
"}",
"::=",
"{",
"chSysCpuUtilTable",
"1",
"}"
],
"syntax_tree": [
[
"row",
"ChSysCpuUtilEntry"
],
null,
[
"MaxAccessPart",
"not-accessible"
],
[
"Status",
"current"
],
[
"DESCRIPTION",
"Processor and Memory Utilization entry for a particular CPU."
],
null,
null,
[
"INDEX",
[
[
0,
"chSysProcessorIndex"
]
]
],
null
]
}Vendor MIB copy from the Observium Community archive.
Module: F10-Z-SERIES-CHASSIS-MIB
See published definition above
{'SNMPv2-TC': ['DisplayString', 'MacAddress'], 'FORCE10-TC': ['F10SwDate', 'F10ChassisType', 'F10ProcessorModuleType', 'F10MfgDate', 'F10HundredthdB', 'F10SSeriesPortType', 'F10CardOperStatus'], 'SNMPv2-SMI': ['MODULE-IDENTITY', 'OBJECT-TYPE', 'Gauge32', 'Integer32', 'TimeTicks'], 'FORCE10-SMI': ['f10Mgmt'], 'SNMPv2-CONF': ['MODULE-COMPLIANCE', 'OBJECT-GROUP']}Related source files and packages:
Vendor MIB copy from the LibreNMS archive. Dell support.
Module: F10-Z-SERIES-CHASSIS-MIB
{'SNMPv2-TC': ['DisplayString', 'MacAddress'], 'FORCE10-TC': ['F10SwDate', 'F10ChassisType', 'F10ProcessorModuleType', 'F10MfgDate', 'F10HundredthdB', 'F10SSeriesPortType', 'F10CardOperStatus'], 'SNMPv2-SMI': ['MODULE-IDENTITY', 'OBJECT-TYPE', 'Gauge32', 'Integer32', 'TimeTicks'], 'FORCE10-SMI': ['f10Mgmt'], 'SNMPv2-CONF': ['MODULE-COMPLIANCE', 'OBJECT-GROUP']}Related source files and packages:
Vendor MIB copy from the Netdisco archive.
Module: F10-Z-SERIES-CHASSIS-MIB
{'SNMPv2-TC': ['DisplayString', 'MacAddress'], 'FORCE10-TC': ['F10SwDate', 'F10ChassisType', 'F10ProcessorModuleType', 'F10MfgDate', 'F10HundredthdB', 'F10SSeriesPortType', 'F10CardOperStatus'], 'SNMPv2-SMI': ['MODULE-IDENTITY', 'OBJECT-TYPE', 'Gauge32', 'Integer32', 'TimeTicks'], 'FORCE10-SMI': ['f10Mgmt'], 'SNMPv2-CONF': ['MODULE-COMPLIANCE', 'OBJECT-GROUP']}Related source files and packages:
Registration
| OID | Name | Direct children | Descendants | Description |
|---|---|---|---|---|
| 1.3.6.1.4.1.6027.3.25.1.2.3.1.1 | chSysCpuUtil5Sec | 0 | 0 | |
| 1.3.6.1.4.1.6027.3.25.1.2.3.1.2 | chSysCpuUtil1Min | 0 | 0 | |
| 1.3.6.1.4.1.6027.3.25.1.2.3.1.3 | chSysCpuUtil5Min | 0 | 0 | |
| 1.3.6.1.4.1.6027.3.25.1.2.3.1.4 | chSysCpuUtilMemUsage | 0 | 0 | |
| 1.3.6.1.4.1.6027.3.25.1.2.3.1.5 | chSysCpuUtilFlashUsage | 0 | 0 |