Stop or start the clock
1. Stop
2. Start
Parsed from file IRT4430AVK-MIB.my.txt
Company: irtelectronics
Module: IRT4430AVK-MIB
Child arc 0 is used to translate between SNMPv1 and SNMPv2 notification parameters as explained in IETF RFC 2576, section 3.
clkCtrl OBJECT-TYPE SYNTAX INTEGER { stop(1), start(2) } ACCESS read-write STATUS mandatory DESCRIPTION "Stop or start the clock 1. Stop 2. Start" ::= { irt4430AVK 8 }
OID | Name | Sub children | Sub Nodes Total | Description |
---|---|---|---|---|
1.3.6.1.4.1.16557.3.48.8.0 | clkCtrl | 0 | 0 | None |
OID | Name | Sub children | Sub Nodes Total | Description |
---|---|---|---|---|
1.3.6.1.4.1.16557.3.48.1 | alarms | 1 | 1 | Current state of the major and minor alarms |
1.3.6.1.4.1.16557.3.48.2 | videoMode | 1 | 1 | Input video mode 1. PAL 2. NTSC |
1.3.6.1.4.1.16557.3.48.3 | osdMode | 1 | 1 | OSD operation mode 1. Off 2. Scroll with transparent banner 3. Scroll with black banner 4. Static display 5. Timer |
1.3.6.1.4.1.16557.3.48.4 | vPos | 1 | 1 | OSD vertical position: row 1-16 |
1.3.6.1.4.1.16557.3.48.5 | hPos | 1 | 1 | OSD horizontal position: col 1-30 |
1.3.6.1.4.1.16557.3.48.6 | displayText | 1 | 1 | OSD text, 60 characters max. |
1.3.6.1.4.1.16557.3.48.7 | clkSet | 1 | 1 | Set clock HHMMSS: 000000-235959 |
1.3.6.1.4.1.16557.3.48.9 | osdStatus | 1 | 1 | OSD Status 1. Updated - OSD displays current settings 2. Pending - OSD displays previous settings |
1.3.6.1.4.1.16557.3.48.10 | fpgaVersion | 1 | 1 | Software version in the FPGA |
1.3.6.1.4.1.16557.3.48.11 | reset | 1 | 1 | Set to 2, in order to reset the system. |
1.3.6.1.4.1.16557.3.48.12 | generalAlarmTrapEnable | 1 | 1 | Enables delivery of traps when a major or minor alarm occurs and when it clears. |