OID reference

hwCpuIndex

1.3.6.1.4.1.43.45.1.6.1.1.1.1

Description

Full description and source information

Identification

Identifier and names

Parent: 1.3.6.1.4.1.43.45.1.6.1.1.1 (hwCpuEntry)
Node code: 1
Node name: hwCpuIndex
Category: SNMP management object
Numeric OID: 1.3.6.1.4.1.43.45.1.6.1.1.1.1
URN notation: urn:oid:1.3.6.1.4.1.43.45.1.6.1.1.1.1

ASN.1, OID-IRI and named path variants

ASN.1 notation

{1 3 6 1 4 1 43 45 1 6 1 1 1 1}

{iso(1) identified-organization(3) dod(6) internet(1) private(4) enterprise(1) a3Com(43) jv-mib(45) huawei(1) huaweiUtility(6) hwDevice(1) hwCpuTable(1) hwCpuEntry(1) hwCpuIndex(1)}
{iso(1) identified-organization(3) dod(6) internet(1) private(4) enterprise(1) a3com(43) jv-mib(45) huawei(1) huaweiUtility(6) hwDevice(1) hwCpuTable(1) hwCpuEntry(1) hwCpuIndex(1)}
{iso(1) identified-organization(3) dod(6) internet(1) private(4) enterprises(1) a3Com(43) jv-mib(45) huawei(1) huaweiUtility(6) hwDevice(1) hwCpuTable(1) hwCpuEntry(1) hwCpuIndex(1)}
{iso(1) identified-organization(3) dod(6) internet(1) private(4) enterprises(1) a3com(43) jv-mib(45) huawei(1) huaweiUtility(6) hwDevice(1) hwCpuTable(1) hwCpuEntry(1) hwCpuIndex(1)}
{iso(1) identified-organization(3) dod(6) internet(1) private(4) ldap-enterprise(1) a3Com(43) jv-mib(45) huawei(1) huaweiUtility(6) hwDevice(1) hwCpuTable(1) hwCpuEntry(1) hwCpuIndex(1)}
{iso(1) identified-organization(3) dod(6) internet(1) private(4) ldap-enterprise(1) a3com(43) jv-mib(45) huawei(1) huaweiUtility(6) hwDevice(1) hwCpuTable(1) hwCpuEntry(1) hwCpuIndex(1)}
{iso(1) identified-organization(3) dod(6) internet(1) private(4) vendor-objects(1) a3Com(43) jv-mib(45) huawei(1) huaweiUtility(6) hwDevice(1) hwCpuTable(1) hwCpuEntry(1) hwCpuIndex(1)}
{iso(1) identified-organization(3) dod(6) internet(1) private(4) vendor-objects(1) a3com(43) jv-mib(45) huawei(1) huaweiUtility(6) hwDevice(1) hwCpuTable(1) hwCpuEntry(1) hwCpuIndex(1)}
{iso(1) org(3) dod(6) internet(1) private(4) enterprise(1) a3Com(43) jv-mib(45) huawei(1) huaweiUtility(6) hwDevice(1) hwCpuTable(1) hwCpuEntry(1) hwCpuIndex(1)}
{iso(1) org(3) dod(6) internet(1) private(4) enterprise(1) a3com(43) jv-mib(45) huawei(1) huaweiUtility(6) hwDevice(1) hwCpuTable(1) hwCpuEntry(1) hwCpuIndex(1)}
{iso(1) org(3) dod(6) internet(1) private(4) enterprises(1) a3Com(43) jv-mib(45) huawei(1) huaweiUtility(6) hwDevice(1) hwCpuTable(1) hwCpuEntry(1) hwCpuIndex(1)}
{iso(1) org(3) dod(6) internet(1) private(4) enterprises(1) a3com(43) jv-mib(45) huawei(1) huaweiUtility(6) hwDevice(1) hwCpuTable(1) hwCpuEntry(1) hwCpuIndex(1)}
{iso(1) org(3) dod(6) internet(1) private(4) ldap-enterprise(1) a3Com(43) jv-mib(45) huawei(1) huaweiUtility(6) hwDevice(1) hwCpuTable(1) hwCpuEntry(1) hwCpuIndex(1)}
{iso(1) org(3) dod(6) internet(1) private(4) ldap-enterprise(1) a3com(43) jv-mib(45) huawei(1) huaweiUtility(6) hwDevice(1) hwCpuTable(1) hwCpuEntry(1) hwCpuIndex(1)}
{iso(1) org(3) dod(6) internet(1) private(4) vendor-objects(1) a3Com(43) jv-mib(45) huawei(1) huaweiUtility(6) hwDevice(1) hwCpuTable(1) hwCpuEntry(1) hwCpuIndex(1)}
{iso(1) org(3) dod(6) internet(1) private(4) vendor-objects(1) a3com(43) jv-mib(45) huawei(1) huaweiUtility(6) hwDevice(1) hwCpuTable(1) hwCpuEntry(1) hwCpuIndex(1)}
Additional combinations skipped.

OID-IRI notation

/1/3/6/1/4/1/43/45/1/6/1/1/1/1
/ISO/Identified-Organization/6/1/4/1/43/45/1/6/1/1/1/1
/ISO/3/6/1/4/1/43/45/1/6/1/1/1/1

Named path variants

/iso/identified-organization/dod/internet/private/enterprise/a3Com/jv-mib/huawei/huaweiUtility/hwDevice/hwCpuTable/hwCpuEntry/hwCpuIndex
/iso/identified-organization/dod/internet/private/enterprise/a3com/jv-mib/huawei/huaweiUtility/hwDevice/hwCpuTable/hwCpuEntry/hwCpuIndex
/iso/identified-organization/dod/internet/private/enterprises/a3Com/jv-mib/huawei/huaweiUtility/hwDevice/hwCpuTable/hwCpuEntry/hwCpuIndex
/iso/identified-organization/dod/internet/private/enterprises/a3com/jv-mib/huawei/huaweiUtility/hwDevice/hwCpuTable/hwCpuEntry/hwCpuIndex
/iso/identified-organization/dod/internet/private/ldap-enterprise/a3Com/jv-mib/huawei/huaweiUtility/hwDevice/hwCpuTable/hwCpuEntry/hwCpuIndex
/iso/identified-organization/dod/internet/private/ldap-enterprise/a3com/jv-mib/huawei/huaweiUtility/hwDevice/hwCpuTable/hwCpuEntry/hwCpuIndex
/iso/identified-organization/dod/internet/private/vendor-objects/a3Com/jv-mib/huawei/huaweiUtility/hwDevice/hwCpuTable/hwCpuEntry/hwCpuIndex
/iso/identified-organization/dod/internet/private/vendor-objects/a3com/jv-mib/huawei/huaweiUtility/hwDevice/hwCpuTable/hwCpuEntry/hwCpuIndex
/iso/org/dod/internet/private/enterprise/a3Com/jv-mib/huawei/huaweiUtility/hwDevice/hwCpuTable/hwCpuEntry/hwCpuIndex
/iso/org/dod/internet/private/enterprise/a3com/jv-mib/huawei/huaweiUtility/hwDevice/hwCpuTable/hwCpuEntry/hwCpuIndex
/iso/org/dod/internet/private/enterprises/a3Com/jv-mib/huawei/huaweiUtility/hwDevice/hwCpuTable/hwCpuEntry/hwCpuIndex
/iso/org/dod/internet/private/enterprises/a3com/jv-mib/huawei/huaweiUtility/hwDevice/hwCpuTable/hwCpuEntry/hwCpuIndex
/iso/org/dod/internet/private/ldap-enterprise/a3Com/jv-mib/huawei/huaweiUtility/hwDevice/hwCpuTable/hwCpuEntry/hwCpuIndex
/iso/org/dod/internet/private/ldap-enterprise/a3com/jv-mib/huawei/huaweiUtility/hwDevice/hwCpuTable/hwCpuEntry/hwCpuIndex
/iso/org/dod/internet/private/vendor-objects/a3Com/jv-mib/huawei/huaweiUtility/hwDevice/hwCpuTable/hwCpuEntry/hwCpuIndex
/iso/org/dod/internet/private/vendor-objects/a3com/jv-mib/huawei/huaweiUtility/hwDevice/hwCpuTable/hwCpuEntry/hwCpuIndex
Additional combinations skipped.

SNMP properties

Value type: INTEGER
Maximum access defined by MIB: not-accessible
Status in MIB: current

Using this OID with SNMP

At least one MIB declaration places this object in a table row. A value belongs to a row instance; its suffix depends on the row's INDEX or AUGMENTS definition.

In A3COM-HUAWEI-LswDEVM-MIB, the row index hwCpuIndex is declared as INTEGER. A non-negative index value is encoded as one numeric subidentifier. An instance has the form .1.3.6.1.4.1.43.45.1.6.1.1.1.1.<hwCpuIndex>. Use an index value actually present on the device and permitted by its MIB. Other definitions can differ.

A query example is omitted because the source variants do not establish compatible read access.

Properties come from available MIB definitions. Actual device support and access can differ. See source records below for original files and qualifications.

Published definitions

Available source records contain 2 distinct definitions; some records may not include a definition.

Show 2 published definitions

hwCpuIndex · current

hwCpuIndex  OBJECT-TYPE
    SYNTAX  INTEGER
    MAX-ACCESS  not-accessible
    STATUS  current
    DESCRIPTION
            "Index of hwCpuTable. This integer is a  uniq number to
             identify the CPU(s). We recommand two Number Plans in this
             paper, Logical Number or Phisical Number. For the first
             case, hwCpuIndex is a integer, range from 1 to the Maximum
             number, for example 1,2,3,4,5 ..., where 1 represents
             the first CPU, 2 represents the second CPU, etc.  For the
             second case hwCpuIndex represents physical card position
             (Shelf Number, Frame Number, Slot Number, SubSlotNumber)
             where the CPU residing, for example, 0x01020304 represent
             the CPU on the 4th subslot of the 3th slot of the 2nd frame
             of the 1st Shelf. In the condition of multiple CPU system
             where CPU group coordinately  process on one board, we see
             the CPUs as one CPU"
    ::= { hwCpuEntry 1 }

hwCpuIndex · current

hwCpuIndex  OBJECT-TYPE
    SYNTAX  INTEGER
    MAX-ACCESS  not-accessible
    STATUS  current
    DESCRIPTION
            "Index of hwCpuTable. This integer is a  uniq number to
             identify the CPU(s). We recommand two Number Plans in this
             paper, Logical Number or Phisical Number. For the first
             case, hwCpuIndex is a integer, range from 1 to the Maximum
             number, for example 1,2,3,4,5 ..., where 1 represents
             the first CPU, 2 represents the second CPU, etc.  For the
             second case hwCpuIndex represents physical card position
             (Shelf Number, Frame Number, Slot Number, SubSlotNumber)
             where the CPU residing, for example, 0x01020304 represent
             the CPU on the 4th subslot of the 3th slot of the 2nd frame
             of the 1st Shelf. In the condition of multiple CPU system
             where CPU group coordinately  process on one board, we see
             the CPUs as one CPU"
    ::= { hwCpuEntry 1 }

Meaning

Descriptions

1 unique

Identical descriptions are grouped. Different wording and device-specific notes are retained.

Index of hwCpuTable. This integer is a uniq number to identify the CPU(s). We recommand two Number Plans in this paper, Logical Number or Phisical Number. For the first case, hwCpuIndex is a integer, range from 1 to the Maximum number, for example 1,2,3,4,5 ..., where 1 represents the first CPU, 2 represents the second CPU, etc. For the second case hwCpuIndex represents physical card position (Shelf Number, Frame Number, Slot Number, SubSlotNumber) where the CPU residing, for example, 0x01020304 represent the CPU on the 4th subslot of the 3th slot of the 2nd frame of the 1st Shelf. In the condition of multiple CPU system where CPU group coordinately process on one board, we see the CPUs as one CPU

Sources for this description

3Com MIB copies (LibreNMS/Observium Community)Netdisco MIB archive copies

See 1 matching source record

Evidence

Source records

1 records

Matching descriptions are grouped; open a group to compare definitions and supporting files.

Records for description 13Com MIB copies (LibreNMS/Observium Community), Netdisco MIB archive copies1 record · 3 sources

Description 1

hwCpuIndex · current3Com MIB copies (LibreNMS/Observium Community), Netdisco MIB archive copies3 sources

Status in source: current.

Names: hwCpuIndex

Technical details

{
  "smi_kind": "OBJECT-TYPE",
  "definition": [
    "hwCpuIndex",
    "OBJECT-TYPE",
    "SYNTAX",
    "INTEGER",
    "MAX-ACCESS",
    "not-accessible",
    "STATUS",
    "current",
    "DESCRIPTION",
    "\"Index of hwCpuTable. This integer is a uniq number to identify the CPU(s). We recommand two Number Plans in this paper, Logical Number or Phisical Number. For the first case, hwCpuIndex is a integer, range from 1 to the Maximum number, for example 1,2,3,4,5 ..., where 1 represents the first CPU, 2 represents the second CPU, etc. For the second case hwCpuIndex represents physical card position (Shelf Number, Frame Number, Slot Number, SubSlotNumber) where the CPU residing, for example, 0x01020304 represent the CPU on the 4th subslot of the 3th slot of the 2nd frame of the 1st Shelf. In the condition of multiple CPU system where CPU group coordinately process on one board, we see the CPUs as one CPU\"",
    "::=",
    "{",
    "hwCpuEntry",
    "1",
    "}"
  ],
  "syntax_tree": [
    [
      "SimpleSyntax",
      "INTEGER"
    ],
    null,
    [
      "MaxAccessPart",
      "not-accessible"
    ],
    [
      "Status",
      "current"
    ],
    [
      "DESCRIPTION",
      "Index of hwCpuTable. This integer is a uniq number to identify the CPU(s). We recommand two Number Plans in this paper, Logical Number or Phisical Number. For the first case, hwCpuIndex is a integer, range from 1 to the Maximum number, for example 1,2,3,4,5 ..., where 1 represents the first CPU, 2 represents the second CPU, etc. For the second case hwCpuIndex represents physical card position (Shelf Number, Frame Number, Slot Number, SubSlotNumber) where the CPU residing, for example, 0x01020304 represent the CPU on the 4th subslot of the 3th slot of the 2nd frame of the 1st Shelf. In the condition of multiple CPU system where CPU group coordinately process on one board, we see the CPUs as one CPU"
    ],
    null,
    null,
    null,
    null
  ]
}

3Com MIB copies (LibreNMS/Observium Community) · Publisher's source file: A3COM-HUAWEI-LswDEVM-MIB
Vendor MIB copy from the LibreNMS archive. 3Com support.

Module: A3COM-HUAWEI-LswDEVM-MIB

See published definition above
Module imports
```
{'SNMPv2-SMI': ['MODULE-IDENTITY', 'OBJECT-TYPE', 'TimeTicks', 'Gauge32', 'OBJECT-IDENTITY'], 'A3COM-HUAWEI-OID-MIB': ['lswCommon', 'huaweiUtility'], 'A3COM-HUAWEI-DEVICE-MIB': ['hwLswFrameIndex', 'hwLswSlotIndex']}
```
· Download A3COM-HUAWEI-LswDEVM-MIB
Related source files and packages:
- LibreNMS original distribution archive
- Archive revision metadata: librenms/librenms (JSON)
3Com MIB copies (LibreNMS/Observium Community) · Publisher's source file: Source package: observium-community-latest.tar.gz
Vendor MIB copy from the Observium Community archive. 3Com support.

Module: A3COM-HUAWEI-LswDEVM-MIB

See published definition above
Module imports
```
{'SNMPv2-SMI': ['MODULE-IDENTITY', 'OBJECT-TYPE', 'TimeTicks', 'Gauge32', 'OBJECT-IDENTITY'], 'A3COM-HUAWEI-OID-MIB': ['lswCommon', 'huaweiUtility'], 'A3COM-HUAWEI-DEVICE-MIB': ['hwLswFrameIndex', 'hwLswSlotIndex']}
```
· Download A3COM-HUAWEI-LswDEVM-MIB
Related source files and packages:
- Observium Community original distribution archive
Netdisco MIB archive copies · Publisher's source file: a3com-huawei-splat-devm.mib
Vendor MIB copy from the Netdisco archive.

Module: A3COM-HUAWEI-LswDEVM-MIB

Same published definition
Module imports
```
{'SNMPv2-SMI': ['MODULE-IDENTITY', 'OBJECT-TYPE', 'TimeTicks', 'Gauge32', 'OBJECT-IDENTITY'], 'A3COM-HUAWEI-OID-MIB': ['lswCommon', 'huaweiUtility'], 'A3COM-HUAWEI-DEVICE-MIB': ['hwLswFrameIndex', 'hwLswSlotIndex']}
```
· Download a3com-huawei-splat-devm.mib
Related source files and packages:
- Netdisco archive revision metadata (not a manufacturer release date)
- Netdisco MIB distribution at the selected archive revision

Registration

Registration authorities

First Registration Authority (inferred from ancestor 1.3.6.1.4.1.43)

Jeremy Siegel

Siblings (3)

OID	Name	Direct children	Descendants	Description
1.3.6.1.4.1.43.45.1.6.1.1.1.2	hwCpuCostRate	0	0
1.3.6.1.4.1.43.45.1.6.1.1.1.3	hwCpuCostRatePer1Min	0	0
1.3.6.1.4.1.43.45.1.6.1.1.1.4	hwCpuCostRatePer5Min	0	0