Status in source: current.
Names: aal2VclRasTimer
Technical details
{
"smi_kind": "OBJECT-TYPE",
"definition": [
"aal2VclRasTimer",
"OBJECT-TYPE",
"SYNTAX",
"Integer32",
"UNITS",
[
"literal",
"226d696c6c697365636f6e647322"
],
"MAX-ACCESS",
"read-write",
"STATUS",
"current",
"DESCRIPTION",
"\"The reassembly timer RAS_Timer assures that the reassembly of an SSSAR-SDU does not exceed a certain time; if such timer supervision is not required, the timer is disabled by setting the timer value to 0. If the timer is exceeded the i366.1 receive state machine goes into the abort state, look for the end of the frame and goes back to idle. See figure 8.1 I.366.2 State transition diagram. The default is 0 milliseconds. Value of 0 means the timer is disabled.\"",
"REFERENCE",
"\"I.366.1 7.7.1, I.366.2 State transition diagram figure 8.1\"",
"::=",
"{",
"aal2VclEntry",
"24",
"}"
],
"syntax_tree": [
[
"SimpleSyntax",
"Integer32"
],
[
"UNITS",
"milliseconds"
],
[
"MaxAccessPart",
"read-write"
],
[
"Status",
"current"
],
[
"DESCRIPTION",
"The reassembly timer RAS_Timer assures that the reassembly of an SSSAR-SDU does not exceed a certain time; if such timer supervision is not required, the timer is disabled by setting the timer value to 0. If the timer is exceeded the i366.1 receive state machine goes into the abort state, look for the end of the frame and goes back to idle. See figure 8.1 I.366.2 State transition diagram. The default is 0 milliseconds. Value of 0 means the timer is disabled."
],
[
"REFERENCE",
"I.366.1 7.7.1, I.366.2 State transition diagram figure 8.1"
],
null,
null,
null
]
}