The baud rate of the internal clock.
Parsed from file Rad0485.MIB.txt
Company: None
Module: RAD-MIB
The baud rate of the internal clock.
Parsed from file RAD-MIB.mib
Module: RAD-MIB
Vendor: Rad Data Communications
Module: RAD-MIB (rad-mib.mib)
Type: TABULAR
Access: read-write
Syntax: INTEGER
Automatically extracted from www.mibdepot.com
pktSwchFrInternalClockS OBJECT-TYPE SYNTAX INTEGER { r2400bps (1), r4800bps (2), r9600bps (3), r14400bps(4), r19200bps(5), r38400bps(6), r48Kbps (7), r56Kbps (8), r64Kbps (9), r128Kbps (10), r256Kbps (11), r384Kbps (12), r504Kbps (13), r768Kbps (14), r1008Kbps(15), r1466Kbps(16), r2016Kbps(17), external (255) } MAX-ACCESS read-write STATUS current DESCRIPTION "The baud rate of the internal clock." ::= { pktSwchFrSEntry 9 }
pktSwchFrInternalClockS OBJECT-TYPE SYNTAX INTEGER { r2400bps (1), r4800bps (2), r9600bps (3), r14400bps(4), r19200bps(5), r38400bps(6), r48Kbps (7), r56Kbps (8), r64Kbps (9), r128Kbps (10), r256Kbps (11), r384Kbps (12), r504Kbps (13), r768Kbps (14), r1008Kbps(15), r1466Kbps(16), r2016Kbps(17), external (255) } MAX-ACCESS read-write STATUS current DESCRIPTION "The baud rate of the internal clock." ::= { pktSwchFrSEntry 9 }
OID | Name | Sub children | Sub Nodes Total | Description |
---|---|---|---|---|
1.3.6.1.4.1.164.8.8.2.1.1 | pktSwchFrIfIndexS | 0 | 0 | This is the ifIndex of the frame relay port. |
1.3.6.1.4.1.164.8.8.2.1.2 | pktSwchFrMaintProtS | 0 | 0 | This defines what maintenance protocol is running over this port. 0 - No maintenance protocol. 1 - ANSI PVC maintenance protocol … |
1.3.6.1.4.1.164.8.8.2.1.3 | pktSwchFrMaintModeS | 0 | 0 | This defines the mode of maintenance protocol running over this port. |
1.3.6.1.4.1.164.8.8.2.1.4 | pktSwchFrRxPoolRedLineS | 0 | 0 | When the number of empty receive buffers at the port reaches this figure (of frames),the port receiver is congested. This field… |
1.3.6.1.4.1.164.8.8.2.1.5 | pktSwchFrRxPoolOkS | 0 | 0 | Clear the receive congestion condition when the number of empty receive buffers at the port reaches this figure. This value (of … |
1.3.6.1.4.1.164.8.8.2.1.6 | pktSwchFrTxPoolRedLineS | 0 | 0 | When the number of frames awaiting transmission reaches this figure, the port transmitter is congested. This field value should… |
1.3.6.1.4.1.164.8.8.2.1.7 | pktSwchFrTxPoolOkS | 0 | 0 | Clear the transmit congestion condition when the number of frames awaiting transmission at the port reaches this figure. This v… |
1.3.6.1.4.1.164.8.8.2.1.8 | pktSwchFrTxCeilingS | 0 | 0 | The maximum allowable transmit pool for this port. |
1.3.6.1.4.1.164.8.8.2.1.10 | pktSwchFrNrzModeS | 0 | 0 | The data encoding format. |
1.3.6.1.4.1.164.8.8.2.1.11 | pktSwchFrDlciHeaderModeS | 0 | 0 | Dlci Header length for this FR port. Option 4 means that there will be no management Dlci in the range of 1024 to 8388607. The ma… |
1.3.6.1.4.1.164.8.8.2.1.12 | pktSwchFrDcdLinkFailureS | 0 | 0 | Link Failure Detection by DCD. If Link Failure detection by DCD is on - (3), when the DCD is down, the FR SW will detect it and c… |
1.3.6.1.4.1.164.8.8.2.1.13 | pktSwchFrTxIdlesS | 0 | 0 | This parameter shows whether the PS will Transmit Idles between frames and control the RTS pin. Default: no(2). |
1.3.6.1.4.1.164.8.8.2.1.14 | pktSwchFrOperationModeS | 0 | 0 | When H/W Control is configured, the SCC H/W will detect the change in the DCD or CTS signals and Start or Stop transmission auto… |
1.3.6.1.4.1.164.8.8.2.1.15 | pktSwchFrPhysInterfOptionsS | 0 | 0 | This is the physical interface. Note that the DDS physical interface H/W does not exist in the FPS-8. It is relevant for other PS… |