Information and control for the data channels.
Parsed from file IRT4690DDR-MIB.my.txt
Company: irtelectronics
Module: IRT4620DDR-MIB
Vendor: IRT Electronics
Module: IRT4620DDR-MIB (IRT4690DDR-MIB.my)
Type: TABLE
Access: not-accessible
Syntax: SEQUENCE OF
Automatically extracted from www.mibdepot.com
channelTable OBJECT-TYPE SYNTAX SEQUENCE OF ChannelEntry ACCESS not-accessible STATUS mandatory DESCRIPTION " Information and control for the data channels." ::= { irt4690DDR 5 }
| OID | Name | Sub children | Sub Nodes Total | Description |
|---|---|---|---|---|
| 1.3.6.1.4.1.16557.3.76.5.1 | channelEntry | 7 | 7 | Information and control for each data channel. |
| OID | Name | Sub children | Sub Nodes Total | Description |
|---|---|---|---|---|
| 1.3.6.1.4.1.16557.3.76.1 | alarms | 1 | 1 | Status of the alarms: 1. no alarm. 2. urgent: input not valid or not detected. 3. non-urgent: input valid, all channels absent. |
| 1.3.6.1.4.1.16557.3.76.2 | inputStatus | 1 | 1 | An indication that valid multiplex signal source detected. |
| 1.3.6.1.4.1.16557.3.76.3 | inputSource | 1 | 1 | Select to process the optical or electrical input. |
| 1.3.6.1.4.1.16557.3.76.4 | ctrlMode | 1 | 1 | SW1-7 on the PCB causes the other switch settings to override all corresponding SNMP settings. |
| 1.3.6.1.4.1.16557.3.76.6 | inputStatusTrapEn | 1 | 1 | Send a trap whenever inputStatus changes. |
| 1.3.6.1.4.1.16557.3.76.7 | firmwareVer | 1 | 1 | Version of the FPGA firmware. |
| 1.3.6.1.4.1.16557.3.76.8 | softwareVer | 1 | 1 | Version of the processor software. |
| 1.3.6.1.4.1.16557.3.76.9 | reset | 1 | 1 | Reset the module to power-up default settings. |