Reset the module to power-up default settings.
Parsed from file IRT4690DDR-MIB.my.txt
Company: irtelectronics
Module: IRT4620DDR-MIB
Child arc 0 is used to translate between SNMPv1 and SNMPv2 notification parameters as explained in IETF RFC 2576, section 3.
reset OBJECT-TYPE SYNTAX INTEGER { normal(1), reset(2) } ACCESS read-write STATUS mandatory DESCRIPTION " Reset the module to power-up default settings." ::= { irt4690DDR 9 }
| OID | Name | Sub children | Sub Nodes Total | Description |
|---|---|---|---|---|
| 1.3.6.1.4.1.16557.3.76.9.0 | reset | 0 | 0 | None |
| OID | Name | Sub children | Sub Nodes Total | Description |
|---|---|---|---|---|
| 1.3.6.1.4.1.16557.3.76.1 | alarms | 1 | 1 | Status of the alarms: 1. no alarm. 2. urgent: input not valid or not detected. 3. non-urgent: input valid, all channels absent. |
| 1.3.6.1.4.1.16557.3.76.2 | inputStatus | 1 | 1 | An indication that valid multiplex signal source detected. |
| 1.3.6.1.4.1.16557.3.76.3 | inputSource | 1 | 1 | Select to process the optical or electrical input. |
| 1.3.6.1.4.1.16557.3.76.4 | ctrlMode | 1 | 1 | SW1-7 on the PCB causes the other switch settings to override all corresponding SNMP settings. |
| 1.3.6.1.4.1.16557.3.76.5 | channelTable | 1 | 8 | Information and control for the data channels. |
| 1.3.6.1.4.1.16557.3.76.6 | inputStatusTrapEn | 1 | 1 | Send a trap whenever inputStatus changes. |
| 1.3.6.1.4.1.16557.3.76.7 | firmwareVer | 1 | 1 | Version of the FPGA firmware. |
| 1.3.6.1.4.1.16557.3.76.8 | softwareVer | 1 | 1 | Version of the processor software. |