OID reference

unitAlarmStatus2

1.3.6.1.4.1.1206.4.2.1.3.7

Description

<Definition> Device Alarm Mask 2 ( 0 = False, 1 = True) as follows: Bit 7: Process Failure - Whenever the CU detects a process (task) failure. Bit 6: Stall Condition - Whenever the CU detects a watchdog condition on any 'critical' watchdog. A 'critical' watchdog timer is any timer for a process or service that may jeo…

Full description and source information

Identification

Identifier and names

Parent
1.3.6.1.4.1.1206.4.2.1.3 (unit)
Node code
7
Node name
unitAlarmStatus2
Category
SNMP management object
Numeric OID
1.3.6.1.4.1.1206.4.2.1.3.7
URN notation
urn:oid:1.3.6.1.4.1.1206.4.2.1.3.7
ASN.1, OID-IRI and named path variants
ASN.1 notation

{1 3 6 1 4 1 1206 4 2 1 3 7}

  • {iso(1) identified-organization(3) dod(6) internet(1) private(4) enterprise(1) nema(1206) transportation(4) devices(2) asc(1) unit(3) unitAlarmStatus2(7)}
  • {iso(1) identified-organization(3) dod(6) internet(1) private(4) enterprises(1) nema(1206) transportation(4) devices(2) asc(1) unit(3) unitAlarmStatus2(7)}
  • {iso(1) identified-organization(3) dod(6) internet(1) private(4) ldap-enterprise(1) nema(1206) transportation(4) devices(2) asc(1) unit(3) unitAlarmStatus2(7)}
  • {iso(1) identified-organization(3) dod(6) internet(1) private(4) vendor-objects(1) nema(1206) transportation(4) devices(2) asc(1) unit(3) unitAlarmStatus2(7)}
  • {iso(1) org(3) dod(6) internet(1) private(4) enterprise(1) nema(1206) transportation(4) devices(2) asc(1) unit(3) unitAlarmStatus2(7)}
  • {iso(1) org(3) dod(6) internet(1) private(4) enterprises(1) nema(1206) transportation(4) devices(2) asc(1) unit(3) unitAlarmStatus2(7)}
  • {iso(1) org(3) dod(6) internet(1) private(4) ldap-enterprise(1) nema(1206) transportation(4) devices(2) asc(1) unit(3) unitAlarmStatus2(7)}
  • {iso(1) org(3) dod(6) internet(1) private(4) vendor-objects(1) nema(1206) transportation(4) devices(2) asc(1) unit(3) unitAlarmStatus2(7)}
  • {iso(1) iso-identified-organization(3) dod(6) internet(1) private(4) enterprise(1) nema(1206) transportation(4) devices(2) asc(1) unit(3) unitAlarmStatus2(7)}
  • {iso(1) iso-identified-organization(3) dod(6) internet(1) private(4) enterprises(1) nema(1206) transportation(4) devices(2) asc(1) unit(3) unitAlarmStatus2(7)}
  • {iso(1) iso-identified-organization(3) dod(6) internet(1) private(4) ldap-enterprise(1) nema(1206) transportation(4) devices(2) asc(1) unit(3) unitAlarmStatus2(7)}
  • {iso(1) iso-identified-organization(3) dod(6) internet(1) private(4) vendor-objects(1) nema(1206) transportation(4) devices(2) asc(1) unit(3) unitAlarmStatus2(7)}
  • {iso(1) iso-organization(3) dod(6) internet(1) private(4) enterprise(1) nema(1206) transportation(4) devices(2) asc(1) unit(3) unitAlarmStatus2(7)}
  • {iso(1) iso-organization(3) dod(6) internet(1) private(4) enterprises(1) nema(1206) transportation(4) devices(2) asc(1) unit(3) unitAlarmStatus2(7)}
  • {iso(1) iso-organization(3) dod(6) internet(1) private(4) ldap-enterprise(1) nema(1206) transportation(4) devices(2) asc(1) unit(3) unitAlarmStatus2(7)}
  • {iso(1) iso-organization(3) dod(6) internet(1) private(4) vendor-objects(1) nema(1206) transportation(4) devices(2) asc(1) unit(3) unitAlarmStatus2(7)}
OID-IRI notation
  • /1/3/6/1/4/1/1206/4/2/1/3/7
  • /ISO/Identified-Organization/6/1/4/1/1206/4/2/1/3/7
  • /ISO/3/6/1/4/1/1206/4/2/1/3/7
Named path variants
  • /iso/identified-organization/dod/internet/private/enterprise/1206/transportation/devices/asc/unit/unitAlarmStatus2
  • /iso/identified-organization/dod/internet/private/enterprise/nema/transportation/devices/asc/unit/unitAlarmStatus2
  • /iso/identified-organization/dod/internet/private/enterprises/1206/transportation/devices/asc/unit/unitAlarmStatus2
  • /iso/identified-organization/dod/internet/private/enterprises/nema/transportation/devices/asc/unit/unitAlarmStatus2
  • /iso/identified-organization/dod/internet/private/ldap-enterprise/1206/transportation/devices/asc/unit/unitAlarmStatus2
  • /iso/identified-organization/dod/internet/private/ldap-enterprise/nema/transportation/devices/asc/unit/unitAlarmStatus2
  • /iso/identified-organization/dod/internet/private/vendor-objects/1206/transportation/devices/asc/unit/unitAlarmStatus2
  • /iso/identified-organization/dod/internet/private/vendor-objects/nema/transportation/devices/asc/unit/unitAlarmStatus2
  • /iso/org/dod/internet/private/enterprise/1206/transportation/devices/asc/unit/unitAlarmStatus2
  • /iso/org/dod/internet/private/enterprise/nema/transportation/devices/asc/unit/unitAlarmStatus2
  • /iso/org/dod/internet/private/enterprises/1206/transportation/devices/asc/unit/unitAlarmStatus2
  • /iso/org/dod/internet/private/enterprises/nema/transportation/devices/asc/unit/unitAlarmStatus2
  • /iso/org/dod/internet/private/ldap-enterprise/1206/transportation/devices/asc/unit/unitAlarmStatus2
  • /iso/org/dod/internet/private/ldap-enterprise/nema/transportation/devices/asc/unit/unitAlarmStatus2
  • /iso/org/dod/internet/private/vendor-objects/1206/transportation/devices/asc/unit/unitAlarmStatus2
  • /iso/org/dod/internet/private/vendor-objects/nema/transportation/devices/asc/unit/unitAlarmStatus2
  • Additional combinations skipped.

SNMP properties

Value type
INTEGER
Maximum access defined by MIB
read-only
Status in MIB
mandatory, optional

Definitions may combine these properties differently.

Compare 2 source variants

Variant 1 — NTCIP published standard MIB annexes (reviewed modules)

Value type
INTEGER
Maximum access defined by MIB
read-only
Status in MIB
mandatory
Allowed ranges
0–255

Variant 2 — NTCIP published standard MIB annexes (reviewed modules)

Value type
INTEGER
Maximum access defined by MIB
read-only
Status in MIB
optional
Allowed ranges
0–255

Using this OID with SNMP

At least one MIB declaration places this object in a scalar group. A scalar instance uses the suffix .0.

snmpget [connection options] DEVICE .1.3.6.1.4.1.1206.4.2.1.3.7.0

Replace the placeholders with your connection and authentication options. Available permissions and device support can differ from the MIB.

Properties come from available MIB definitions. Actual device support and access can differ. See source records below for original files and qualifications.

Available source records contain 4 distinct definitions; some records may not include a definition.

Show 4 published definitions

unitAlarmStatus2 · mandatory

unitAlarmStatus2   OBJECT-TYPE
      SYNTAX INTEGER (0..255)
      ACCESS read-only
      STATUS mandatory
      DESCRIPTION "<Definition> Device Alarm Mask 2 ( 0 = False, 1 = True) as
            follows:
            Bit 7: Process Failure - Whenever the CU detects a process (task)
                  failure.
            Bit 6: Stall Condition - Whenever the CU detects a watchdog
                  condition on any 'critical' watchdog. A 'critical' watchdog
                  timer is any timer for a process or service that may
                  jeopardize the safe operation of the ASC.


                                                                                        

                  
        

            Bit 5: Offset Transitioning - Whenever the CU is performing an
                  offset transition (correction in process)
            Bit 4: Stop Time - When either CU Stop Time Input becomes active.
            Bit 3: External Start - When the CU External Start becomes
                  active.
            Bit 2: Response Fault - When any NEMA TS2 Port 1 response frame
                  fault occurs.
            Bit 1: Low Battery - When any battery voltage falls below the
                  required level.
            Bit 0: Power Restart - When power returns after a power
                  interruption. Once set, a bit shall maintain its state as
                  long as the condition exists. Bit 0 (Power Restart) status
                  shall be maintained until a READ of this object occurs.
      <Object Identifier> 1.3.6.1.4.1.1206.4.2.1.3.7"
::= { unit 7 }

unitAlarmStatus2 · optional

unitAlarmStatus2   OBJECT-TYPE
   SYNTAX   INTEGER (0..255)
   ACCESS   read-only
   STATUS   optional
   DESCRIPTION
      "<Definition> Device Alarm Mask 2 ( 0 = False,
       1 = True) as follows:
          Bit 7: Reserved.
          Bit 6: Reserved.
          Bit 5: Offset Transitioning - Whenever the CU is
             performing an offset transition (correction in
             process)
          Bit 4: Stop Time - When either CU Stop Time Input
             becomes active.
          Bit 3: External Start - When the CU External Start
             becomes active.



                                                                                   

                                                                                     
                                                                                    

          Bit 2: Response Fault - When any NEMA TS2 Port 1
             response frame fault occurs.
          Bit 1: Low Battery - When any battery voltage
             falls below the required level.
          Bit 0: Power Restart - When power returns after a
             power interruption.
       Once set, a bit shall maintain it’s state as long as
       the condition exists. Bit 0 (Power Restart) status
       shall be maintained until a READ of this object
       occurs.
       <DescriptiveName> NTCIP-1202::ASC.unitAlarmStatus2
       <DataConceptType> Data Element"
::= { unit 7 }

unitAlarmStatus2 · mandatory

unitAlarmStatus2   OBJECT-TYPE
      SYNTAX INTEGER (0..255)
      ACCESS read-only
      STATUS mandatory
      DESCRIPTION "<Definition> Device Alarm Mask 2 ( 0 = False, 1 = True) as
            follows:


                                                                                        

                  
        

            Bit 7: Process Failure - Whenever the CU detects a process (task)
                  failure.
            Bit 6: Stall Condition - Whenever the CU detects a watchdog
                  condition on any 'critical' watchdog. A 'critical' watchdog
                  timer is any timer for a process or service that may
                  jeopardize the safe operation of the ASC.
            Bit 5: Offset Transitioning - Whenever the CU is performing an
                  offset transition (correction in process)
            Bit 4: Stop Time - When either CU Stop Time Input becomes active.
            Bit 3: External Start - When the CU External Start becomes
                  active.
            Bit 2: Response Fault - When any NEMA TS2 Port 1 response frame
                  fault occurs.
            Bit 1: Low Battery - When any battery voltage falls below the
                  required level.
            Bit 0: Power Restart - When power returns after a power
                  interruption. Once set, a bit shall maintain its state as
                  long as the condition exists. Bit 0 (Power Restart) status
                  shall be maintained until a READ of this object occurs.
      <Object Identifier> 1.3.6.1.4.1.1206.4.2.1.3.7
      <Object Type> S"
::= { unit 7 }

unitAlarmStatus2 · mandatory

unitAlarmStatus2 OBJECT-TYPE
          SYNTAX INTEGER (0..255)
          ACCESS read-only
          STATUS mandatory
          DESCRIPTION
               "Device Alarm Mask 2 ( 0 = False, 1 = True) as follows:
                  Bit 7 - Reserved.
                  Bit 6 - Reserved.
                  Bit 5 - Reserved.
                  Bit 4 - Stop Time - When either CU Stop Time Input becomes active.
                  Bit 3 - External Start - When the CU External Start becomes active.
                  Bit 2 - Response Fault - When any NEMA TS2 Port 1 response frame fault occurs.
                  Bit 1 - Low Battery - When any battery voltage falls below the required level.
                  Bit 0 - Power Restart - When power returns after a power interruption.
               Once set, a bit shall maintain it’s state as long as the condition exists."
::= { unit 7 }

Meaning

Descriptions

4 unique

Identical descriptions are grouped. Different wording and device-specific notes are retained.

Description 1

<Definition> Device Alarm Mask 2 ( 0 = False, 1 = True) as follows: Bit 7: Process Failure - Whenever the CU detects a process (task) failure. Bit 6: Stall Condition - Whenever the CU detects a watchdog condition on any 'critical' watchdog. A 'critical' watchdog timer is any timer for a process or service that may jeopardize the safe operation of the ASC. Bit 5: Offset Transitioning - Whenever the CU is performing an offset transition (correction in process) Bit 4: Stop Time - When either CU Stop Time Input becomes active. Bit 3: External Start - When the CU External Start becomes active. Bit 2: Response Fault - When any NEMA TS2 Port 1 response frame fault occurs. Bit 1: Low Battery - When any battery voltage falls below the required level. Bit 0: Power Restart - When power returns after a power interruption. Once set, a bit shall maintain its state as long as the condition exists. Bit 0 (Power Restart) status shall be maintained until a READ of this object occurs. <Object Identifier> 1.3.6.1.4.1.1206.4.2.1.3.7

Sources for this description

NTCIP published standard MIB annexes (reviewed modules)

See 1 matching source record

Description 2

<Definition> Device Alarm Mask 2 ( 0 = False, 1 = True) as follows: Bit 7: Reserved. Bit 6: Reserved. Bit 5: Offset Transitioning - Whenever the CU is performing an offset transition (correction in process) Bit 4: Stop Time - When either CU Stop Time Input becomes active. Bit 3: External Start - When the CU External Start becomes active. Bit 2: Response Fault - When any NEMA TS2 Port 1 response frame fault occurs. Bit 1: Low Battery - When any battery voltage falls below the required level. Bit 0: Power Restart - When power returns after a power interruption. Once set, a bit shall maintain it’s state as long as the condition exists. Bit 0 (Power Restart) status shall be maintained until a READ of this object occurs. <DescriptiveName> NTCIP-1202::ASC.unitAlarmStatus2 <DataConceptType> Data Element

Sources for this description

NTCIP published standard MIB annexes (reviewed modules)

See 1 matching source record

Description 3

<Definition> Device Alarm Mask 2 ( 0 = False, 1 = True) as follows: Bit 7: Process Failure - Whenever the CU detects a process (task) failure. Bit 6: Stall Condition - Whenever the CU detects a watchdog condition on any 'critical' watchdog. A 'critical' watchdog timer is any timer for a process or service that may jeopardize the safe operation of the ASC. Bit 5: Offset Transitioning - Whenever the CU is performing an offset transition (correction in process) Bit 4: Stop Time - When either CU Stop Time Input becomes active. Bit 3: External Start - When the CU External Start becomes active. Bit 2: Response Fault - When any NEMA TS2 Port 1 response frame fault occurs. Bit 1: Low Battery - When any battery voltage falls below the required level. Bit 0: Power Restart - When power returns after a power interruption. Once set, a bit shall maintain its state as long as the condition exists. Bit 0 (Power Restart) status shall be maintained until a READ of this object occurs. <Object Identifier> 1.3.6.1.4.1.1206.4.2.1.3.7 <Object Type> S

Sources for this description

NTCIP published standard MIB annexes (reviewed modules)

See 1 matching source record

Description 4

Device Alarm Mask 2 ( 0 = False, 1 = True) as follows: Bit 7 - Reserved. Bit 6 - Reserved. Bit 5 - Reserved. Bit 4 - Stop Time - When either CU Stop Time Input becomes active. Bit 3 - External Start - When the CU External Start becomes active. Bit 2 - Response Fault - When any NEMA TS2 Port 1 response frame fault occurs. Bit 1 - Low Battery - When any battery voltage falls below the required level. Bit 0 - Power Restart - When power returns after a power interruption. Once set, a bit shall maintain it’s state as long as the condition exists.

Sources for this description

NTCIP published standard MIB annexes (reviewed modules)

See 1 matching source record

Evidence

Source records

4 records

Matching descriptions are grouped; open a group to compare definitions and supporting files.

Records for description 1NTCIP published standard MIB annexes (reviewed modules)1 record · 1 source

Description 1

unitAlarmStatus2 · mandatoryNTCIP published standard MIB annexes (reviewed modules)1 source

Status in source: mandatory.

Names: unitAlarmStatus2

Technical details
{
  "smi_kind": "OBJECT-TYPE",
  "definition": [
    "unitAlarmStatus2",
    "OBJECT-TYPE",
    "SYNTAX",
    "INTEGER",
    "(",
    "0",
    ".",
    ".",
    "255",
    ")",
    "ACCESS",
    "read-only",
    "STATUS",
    "mandatory",
    "DESCRIPTION",
    "\"<Definition> Device Alarm Mask 2 ( 0 = False, 1 = True) as follows: Bit 7: Process Failure - Whenever the CU detects a process (task) failure. Bit 6: Stall Condition - Whenever the CU detects a watchdog condition on any 'critical' watchdog. A 'critical' watchdog timer is any timer for a process or service that may jeopardize the safe operation of the ASC. Bit 5: Offset Transitioning - Whenever the CU is performing an offset transition (correction in process) Bit 4: Stop Time - When either CU Stop Time Input becomes active. Bit 3: External Start - When the CU External Start becomes active. Bit 2: Response Fault - When any NEMA TS2 Port 1 response frame fault occurs. Bit 1: Low Battery - When any battery voltage falls below the required level. Bit 0: Power Restart - When power returns after a power interruption. Once set, a bit shall maintain its state as long as the condition exists. Bit 0 (Power Restart) status shall be maintained until a READ of this object occurs. <Object Identifier> 1.3.6.1.4.1.1206.4.2.1.3.7\"",
    "::=",
    "{",
    "unit",
    "7",
    "}"
  ],
  "syntax_tree": [
    [
      "SimpleSyntax",
      "INTEGER",
      [
        "integerSubType",
        [
          [
            0,
            255
          ]
        ]
      ]
    ],
    null,
    [
      "MaxAccessPart",
      "read-only"
    ],
    [
      "Status",
      "mandatory"
    ],
    [
      "DESCRIPTION",
      "<Definition> Device Alarm Mask 2 ( 0 = False, 1 = True) as follows: Bit 7: Process Failure - Whenever the CU detects a process (task) failure. Bit 6: Stall Condition - Whenever the CU detects a watchdog condition on any 'critical' watchdog. A 'critical' watchdog timer is any timer for a process or service that may jeopardize the safe operation of the ASC. Bit 5: Offset Transitioning - Whenever the CU is performing an offset transition (correction in process) Bit 4: Stop Time - When either CU Stop Time Input becomes active. Bit 3: External Start - When the CU External Start becomes active. Bit 2: Response Fault - When any NEMA TS2 Port 1 response frame fault occurs. Bit 1: Low Battery - When any battery voltage falls below the required level. Bit 0: Power Restart - When power returns after a power interruption. Once set, a bit shall maintain its state as long as the condition exists. Bit 0 (Power Restart) status shall be maintained until a READ of this object occurs. <Object Identifier> 1.3.6.1.4.1.1206.4.2.1.3.7"
    ],
    null,
    null,
    null,
    null
  ]
}
Records for description 2NTCIP published standard MIB annexes (reviewed modules)1 record · 1 source

Description 2

unitAlarmStatus2 · optionalNTCIP published standard MIB annexes (reviewed modules)1 source

Status in source: optional.

Names: unitAlarmStatus2

Technical details
{
  "smi_kind": "OBJECT-TYPE",
  "definition": [
    "unitAlarmStatus2",
    "OBJECT-TYPE",
    "SYNTAX",
    "INTEGER",
    "(",
    "0",
    ".",
    ".",
    "255",
    ")",
    "ACCESS",
    "read-only",
    "STATUS",
    "optional",
    "DESCRIPTION",
    "\"<Definition> Device Alarm Mask 2 ( 0 = False, 1 = True) as follows: Bit 7: Reserved. Bit 6: Reserved. Bit 5: Offset Transitioning - Whenever the CU is performing an offset transition (correction in process) Bit 4: Stop Time - When either CU Stop Time Input becomes active. Bit 3: External Start - When the CU External Start becomes active. Bit 2: Response Fault - When any NEMA TS2 Port 1 response frame fault occurs. Bit 1: Low Battery - When any battery voltage falls below the required level. Bit 0: Power Restart - When power returns after a power interruption. Once set, a bit shall maintain it’s state as long as the condition exists. Bit 0 (Power Restart) status shall be maintained until a READ of this object occurs. <DescriptiveName> NTCIP-1202::ASC.unitAlarmStatus2 <DataConceptType> Data Element\"",
    "::=",
    "{",
    "unit",
    "7",
    "}"
  ],
  "syntax_tree": [
    [
      "SimpleSyntax",
      "INTEGER",
      [
        "integerSubType",
        [
          [
            0,
            255
          ]
        ]
      ]
    ],
    null,
    [
      "MaxAccessPart",
      "read-only"
    ],
    [
      "Status",
      "optional"
    ],
    [
      "DESCRIPTION",
      "<Definition> Device Alarm Mask 2 ( 0 = False, 1 = True) as follows: Bit 7: Reserved. Bit 6: Reserved. Bit 5: Offset Transitioning - Whenever the CU is performing an offset transition (correction in process) Bit 4: Stop Time - When either CU Stop Time Input becomes active. Bit 3: External Start - When the CU External Start becomes active. Bit 2: Response Fault - When any NEMA TS2 Port 1 response frame fault occurs. Bit 1: Low Battery - When any battery voltage falls below the required level. Bit 0: Power Restart - When power returns after a power interruption. Once set, a bit shall maintain it’s state as long as the condition exists. Bit 0 (Power Restart) status shall be maintained until a READ of this object occurs. <DescriptiveName> NTCIP-1202::ASC.unitAlarmStatus2 <DataConceptType> Data Element"
    ],
    null,
    null,
    null,
    null
  ]
}
Records for description 3NTCIP published standard MIB annexes (reviewed modules)1 record · 1 source

Description 3

unitAlarmStatus2 · mandatoryNTCIP published standard MIB annexes (reviewed modules)1 source

Status in source: mandatory.

Names: unitAlarmStatus2

Technical details
{
  "smi_kind": "OBJECT-TYPE",
  "definition": [
    "unitAlarmStatus2",
    "OBJECT-TYPE",
    "SYNTAX",
    "INTEGER",
    "(",
    "0",
    ".",
    ".",
    "255",
    ")",
    "ACCESS",
    "read-only",
    "STATUS",
    "mandatory",
    "DESCRIPTION",
    "\"<Definition> Device Alarm Mask 2 ( 0 = False, 1 = True) as follows: Bit 7: Process Failure - Whenever the CU detects a process (task) failure. Bit 6: Stall Condition - Whenever the CU detects a watchdog condition on any 'critical' watchdog. A 'critical' watchdog timer is any timer for a process or service that may jeopardize the safe operation of the ASC. Bit 5: Offset Transitioning - Whenever the CU is performing an offset transition (correction in process) Bit 4: Stop Time - When either CU Stop Time Input becomes active. Bit 3: External Start - When the CU External Start becomes active. Bit 2: Response Fault - When any NEMA TS2 Port 1 response frame fault occurs. Bit 1: Low Battery - When any battery voltage falls below the required level. Bit 0: Power Restart - When power returns after a power interruption. Once set, a bit shall maintain its state as long as the condition exists. Bit 0 (Power Restart) status shall be maintained until a READ of this object occurs. <Object Identifier> 1.3.6.1.4.1.1206.4.2.1.3.7 <Object Type> S\"",
    "::=",
    "{",
    "unit",
    "7",
    "}"
  ],
  "syntax_tree": [
    [
      "SimpleSyntax",
      "INTEGER",
      [
        "integerSubType",
        [
          [
            0,
            255
          ]
        ]
      ]
    ],
    null,
    [
      "MaxAccessPart",
      "read-only"
    ],
    [
      "Status",
      "mandatory"
    ],
    [
      "DESCRIPTION",
      "<Definition> Device Alarm Mask 2 ( 0 = False, 1 = True) as follows: Bit 7: Process Failure - Whenever the CU detects a process (task) failure. Bit 6: Stall Condition - Whenever the CU detects a watchdog condition on any 'critical' watchdog. A 'critical' watchdog timer is any timer for a process or service that may jeopardize the safe operation of the ASC. Bit 5: Offset Transitioning - Whenever the CU is performing an offset transition (correction in process) Bit 4: Stop Time - When either CU Stop Time Input becomes active. Bit 3: External Start - When the CU External Start becomes active. Bit 2: Response Fault - When any NEMA TS2 Port 1 response frame fault occurs. Bit 1: Low Battery - When any battery voltage falls below the required level. Bit 0: Power Restart - When power returns after a power interruption. Once set, a bit shall maintain its state as long as the condition exists. Bit 0 (Power Restart) status shall be maintained until a READ of this object occurs. <Object Identifier> 1.3.6.1.4.1.1206.4.2.1.3.7 <Object Type> S"
    ],
    null,
    null,
    null,
    null
  ]
}
Records for description 4NTCIP published standard MIB annexes (reviewed modules)1 record · 1 source

Description 4

unitAlarmStatus2 · mandatoryNTCIP published standard MIB annexes (reviewed modules)1 source

Status in source: mandatory.

Names: unitAlarmStatus2

Technical details
{
  "smi_kind": "OBJECT-TYPE",
  "definition": [
    "unitAlarmStatus2",
    "OBJECT-TYPE",
    "SYNTAX",
    "INTEGER",
    "(",
    "0",
    ".",
    ".",
    "255",
    ")",
    "ACCESS",
    "read-only",
    "STATUS",
    "mandatory",
    "DESCRIPTION",
    "\"Device Alarm Mask 2 ( 0 = False, 1 = True) as follows: Bit 7 - Reserved. Bit 6 - Reserved. Bit 5 - Reserved. Bit 4 - Stop Time - When either CU Stop Time Input becomes active. Bit 3 - External Start - When the CU External Start becomes active. Bit 2 - Response Fault - When any NEMA TS2 Port 1 response frame fault occurs. Bit 1 - Low Battery - When any battery voltage falls below the required level. Bit 0 - Power Restart - When power returns after a power interruption. Once set, a bit shall maintain it’s state as long as the condition exists.\"",
    "::=",
    "{",
    "unit",
    "7",
    "}"
  ],
  "syntax_tree": [
    [
      "SimpleSyntax",
      "INTEGER",
      [
        "integerSubType",
        [
          [
            0,
            255
          ]
        ]
      ]
    ],
    null,
    [
      "MaxAccessPart",
      "read-only"
    ],
    [
      "Status",
      "mandatory"
    ],
    [
      "DESCRIPTION",
      "Device Alarm Mask 2 ( 0 = False, 1 = True) as follows: Bit 7 - Reserved. Bit 6 - Reserved. Bit 5 - Reserved. Bit 4 - Stop Time - When either CU Stop Time Input becomes active. Bit 3 - External Start - When the CU External Start becomes active. Bit 2 - Response Fault - When any NEMA TS2 Port 1 response frame fault occurs. Bit 1 - Low Battery - When any battery voltage falls below the required level. Bit 0 - Power Restart - When power returns after a power interruption. Once set, a bit shall maintain it’s state as long as the condition exists."
    ],
    null,
    null,
    null,
    null
  ]
}

Registration

Registration authorities

First Registration Authority (inferred from ancestor 1.3.6.1.4.1.1206)

Schopp Bruce J.

Siblings (26)

OIDNameDirect childrenDescendantsDescription
1.3.6.1.4.1.1206.4.2.1.3.1 unitStartUpFlash00
1.3.6.1.4.1.1206.4.2.1.3.2 unitAutoPedestrianClear00
1.3.6.1.4.1.1206.4.2.1.3.3 unitBackupTime00
1.3.6.1.4.1.1206.4.2.1.3.4 unitRedRevert00
1.3.6.1.4.1.1206.4.2.1.3.5 unitControlStatus00
1.3.6.1.4.1.1206.4.2.1.3.6 unitFlashStatus00
1.3.6.1.4.1.1206.4.2.1.3.8 unitAlarmStatus100
1.3.6.1.4.1.1206.4.2.1.3.9 shortAlarmStatus00
1.3.6.1.4.1.1206.4.2.1.3.10 unitControl00
1.3.6.1.4.1.1206.4.2.1.3.11 maxAlarmGroups00
1.3.6.1.4.1.1206.4.2.1.3.12 alarmGroupTable13
1.3.6.1.4.1.1206.4.2.1.3.13 maxSpecialFunctionOutputs00
1.3.6.1.4.1.1206.4.2.1.3.14 specialFunctionOutputTable15
1.3.6.1.4.1.1206.4.2.1.3.15 unitMCETimeout00
1.3.6.1.4.1.1206.4.2.1.3.16 unitMCEIntAdv00
1.3.6.1.4.1.1206.4.2.1.3.17 ascElevationOffset00
1.3.6.1.4.1.1206.4.2.1.3.18 unitStartUpFlashMode00
1.3.6.1.4.1.1206.4.2.1.3.19 unitUserDefinedBackupTime00
1.3.6.1.4.1.1206.4.2.1.3.20 maxUserDefinedBackupTimeContent00
1.3.6.1.4.1.1206.4.2.1.3.21 unitUserDefinedBackupTimeContentTable14
1.3.6.1.4.1.1206.4.2.1.3.22 ascClock811
1.3.6.1.4.1.1206.4.2.1.3.23 commPorts624
1.3.6.1.4.1.1206.4.2.1.3.24 maxGlobalSetIds00
1.3.6.1.4.1.1206.4.2.1.3.25 globalSetIdTable13
1.3.6.1.4.1.1206.4.2.1.3.26 unitAlarmStatus300
1.3.6.1.4.1.1206.4.2.1.3.27 unitAlarmStatus400